I'm intending to use the following vertical USB C connector because the long board overhang fits requirements, but the footprint causes some concern, not least because it seems to violate JLCPCB design rules and I wonder if assembly would be tricky.
The 0.4mm wide pins are 1mm apart and the datasheet suggests a 0.6mm hole. The default footprint has a 0.7mm hole, which I notice is suggested for a very similar part from the same manufacturer, so I adjusted to 0.6mm. The annular rings of 0.2mm were too close for a 0.7mm hole, but for a 0.6mm hole they will be 0.2mm apart and pass DRC. JLC have said that should be fine, although they specify a minimum of 0.3mm for an anular ring with pth, and if upping the size to that the pads would again be too close. I've opted for 0.81mm pad size currently.
Layout would be as in the image (GND not shown), though I might route VBUS on the other side. Current should be less than 1A. Does this look to be too risky a part to use, with just 0.21mm ring and 0.18mm pad spacing and considering the current, or should assembly be fine? I couldn't deduce a pin length from the datasheet. (https://datasheet.lcsc.com/lcsc/2305041445_Jing-Extension-of-the-Electronic-Co--918-518K2023D50001_C399934.pdf)
