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I have a circuit with a Nexperia 74LVC1G80 D-type flip-flop.

The inverted Q is connected to the D input as I want to use it as a toggle switch for the OUT_SIGNAL. Problem is that I never get the OUT_SIGNAL to stay toggled.

74LVC1G80 flip-flop

Checking C + inv-Q with the scope during a SW-generated pulse the inv-Q jumps up to 3.3 V until the end of the pulse (bottom has the starting/ending part of the pulse).

Scope during a clock-pulse

Any ideas why it won't stay toggled?

Update:

As several folks pointed out the rise/fall time was too slow so RC-filter had to go. But removing the filter makes the sw2-switch bouncy which will cause sporadic problems with getting the switch to toggle state. For reference I removed R13, C32 and changed R47 to 300ohm.

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  • \$\begingroup\$ After checking the datasheet, the input is not stabilized when the clock comes in. I think this might be your issue. But I'm not sure. \$\endgroup\$
    – Julien
    Commented Jul 27, 2023 at 19:24
  • \$\begingroup\$ @brhans Disagree. Feeding !Q back to D should work just fine even for the LVC1G80. This is the same as feeding Q (or !Q) to another D flop using the same clock. If what you said were true, no clocked system would work... \$\endgroup\$
    – hacktastical
    Commented Jul 27, 2023 at 21:50
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    \$\begingroup\$ More likely, the clock input rise / fall time is too slow so there is an extra, unwanted clock causing the flop to toggle back. \$\endgroup\$
    – hacktastical
    Commented Jul 27, 2023 at 21:52
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    \$\begingroup\$ I expect a rise time of around 200 µs with 1 kohm and 100 nF as input filter. Why are there so much faster edges? Do you have a proper GND connection between all components? \$\endgroup\$
    – Jens
    Commented Jul 28, 2023 at 3:56
  • \$\begingroup\$ Your circuit should work - something's just not as it seems. I'd look for bad part, wrong part, solder short or open, something else on board interfering, really poor grounding... \$\endgroup\$
    – td127
    Commented Jul 28, 2023 at 4:13

1 Answer 1

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It is correct to debounce the button with an R-C circuit. However, the output of this violates the Δt/ΔV limit:

74LVC1G80 Δt/ΔV

When the rising or falling edge at the input is too slow, and the voltage is near the switching threshold, then the current spikes of the internal switching can move the VCC/GND voltages, which changes the switching threshold, and leads to oscillations. The result is that the flip-flop detects multiple clock pulses. (TI has a FAQ about this.)

Schmitt-trigger inputs work with slow edges. So insert a Schmitt-trigger buffer (e.g., 74LVC1G17) in front of the clock input, or use a flip-flop with integrated Schmitt-trigger inputs (e.g., SN74HCS74; there is no single-gate version).

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  • \$\begingroup\$ The IC has "Schmitt-trigger action at all inputs makes the circuit tolerant of slower input rise and fall times" (The TI version with a S-prefix has not). When I get back home I'll try to remove the R-C (or make it de-bounce less) and see what happens. \$\endgroup\$
    – John Obaterspok
    Commented Jul 28, 2023 at 8:58
  • \$\begingroup\$ That "Schmitt-trigger action" is not enough to tolerate slow edges; the Δt/ΔV limit is there for a reason. Without debouncing, the button will generate multiple clock pulses. \$\endgroup\$
    – CL.
    Commented Jul 28, 2023 at 9:23
  • \$\begingroup\$ @JohnObaterspok See the Wikipedia page about contact bounce as a start. \$\endgroup\$
    – the busybee
    Commented Jul 28, 2023 at 12:38

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