I agree with user @sai, who suggests the problem is caused by the +5V rail rising way too slowly, leaving Q2 switched off, and allowing the MOSFET Q4 to be switched on by R10 to +BATT.
To fix that, we need to make Q2's default state, in the absence of +5V or a PWM signal, correspond to the motor being off.
Also, your current scheme inverts the "meaning" of the PWM signal, so that low duty cycle corresponds to the motor being powered most of the time, and vice versa.
Both of these problems can be fixed by adding another inverter stage between Q2 and Q4:
![schematic](https://cdn.statically.io/img/i.sstatic.net/uUFX2.png)
simulate this circuit – Schematic created using CircuitLab
At this high PWM frequency of 20kHz, the delay between the input's falling edge and Q4's gate following suit, will be a significant chunk of the entire cycle. This is caused by the BJTs taking forever to recover from deep saturation:
![enter image description here](https://cdn.statically.io/img/i.sstatic.net/8jec0.png)
This can be mitigated by preventing the transistors from saturating so deeply, which we can achieve with a little emitter degeneration:
![schematic](https://cdn.statically.io/img/i.sstatic.net/lgFjb.png)
simulate this circuit
You might notice base and gate resistances R9 and 22Ω are gone, we don't need them any more. I made some changes to R2 and R3, and added R4 and R5, which have the effect of reducing gain and saturation, allowing the transistors to recover much more quickly:
![enter image description here](https://cdn.statically.io/img/i.sstatic.net/l9gWX.png)
If I got those values right (and I believe I did), the circuit will work well from 5V or 3.3V PWM input, and any +BATT potential from +20V to +30V. I do not think this design is suitable for battery voltages outside that range.
Also, since R6 and R7 divide the battery voltage by two, you can get rid of D1. The IRLR7843's maximum \$V_{GS}\$ (±20V) will not be exceeded.