If I were to have to design this on a PCB, what are some tips that I need to follow?
Creepage distances - keep them conservative. 8mm spacing for 1000V would be a good bet I think.
Are there some obvious problems with the circuit, if so what are they, how do I mitigate them?
Using smoothing capacitors to stabilize current will require impractical capacitances and currents. You do want a linear regulator there.
The fundamental harmonic of the current across the capacitor is 140A which is a lot, should I be worried?
No way - not for real capacitors, not for real transformers. Never mind that 400μF at over 1000VDC is not something you'll buy in any single capacitor. You'll need four 450VDC capacitors in series, with balancing resistors. And you won't want 4x1.6mF in series either. 4x100μF/450V in series would be most practical, anything over that may become huge, unwieldy, and an arc flash hazard.
How can I increase the current across the load?
The current will be determined by the power rating of the transformer - everything else in the circuit is then sized to accommodate a somewhat derated rating of the transformer.
Now let's look at this design step-by-step.
First of all, this is a 500W supply: \$P=(1000{\,\rm V})^2/2{\,\rm k \Omega}=0.5\cdot 10^{6-3}{\,\rm W}=0.5{\,\rm kW}.\$, and with derating you're looking at a 750W design. The transformer should be rated 600VA or higher if you want to run it continuously and have some margins left, perhaps 750VA would be better. Giving transformer's insulation an easier job is always beneficial, so running that transformer not very hot is the idea.
It doesn't have to be said that at such voltages and power levels, not only is electrocution is a hazard, but also arc flash. With an inadvertent low-impedance short (say with a tool), chunks of traces will readily vaporize. Having copper plasma thrown at you is not advisable to say the least. In other words, this project will very happily kill you and/or set the room on fire. Do not work on this thing alone.
Once the power level is given, we need to define the input voltage range specification. Conservatively you'd want it to work within ±15% of nominal input voltage.
Then we need to decide on a reasonable power loss in the regulator circuit - this is driven by the ripple voltage, and the requirement on the output capacitance. The output current at 500W is 0.5A, so let's go with that - we can always "upsize". Suppose we want the regulator to dissipate 10% on top of the load power, so 50W.
To reduce dissipation, we'll use a two-stage regulator. The first stage will have a fairly small conduction angle and will pre-regulate the bulk capacitor voltage. That is, we have one series regulator directly between rectifier output and the bulk capacitor. The bulk capacitor is charged in pulses up to the preregulator voltage VR. This voltage needs to be at least about 15V higher than the output voltage, to maintain regulation across the 2nd regulator stage.
The voltage on the bulk capacitor will be approximately a sawtooth. Let's say we set 100Vp-p ripple. That's $$V_{rms\,saw}=\frac{V_{pp}}{2\sqrt 3}=\frac{100{\,\rm V}}{2\sqrt3} \approx 30V_{rms}.$$
At 0.5A, that's about 15W dissipated on the 2nd regulator stage. The 1st stage should be dissipating about 35W - we'll check that.
Given the 100Vp-p ripple, we can size the bulk capacitor: $$ C=Q/V=\frac{0.5{\,\rm A}\cdot 1/120{\,\rm s}}{100{\,\rm V}}\approx 42\mu F.$$
For that capacitance, it is feasible to either use a parallel bank of 2kV rated foil capacitors of about 0.5μF each, or - assuming -50% tolerance - four 470μF/450V in series.
Thus far, the circuit looks as follows:
simulate this circuit – Schematic created using CircuitLab
There are two regulator loops:
OA1 maintains the output at the center point of R19 and R20. After C9 has charged up, and OUT is at 1.0kV, there's exactly 12V across R19 and R20. R9-R14 scale the output voltage for feedback.
Q6 maintains the pre-regulator gate voltage VG1 at such a level that the lower envelope of VB - at VBLOW - is at about 25V. The VBLOW envelope detector consists of R17,C6,D7.
M2 dissipates about 20..30W, depending on line level, thanks to the VBLOW envelope regulation low.
M1 dissipates another 20..50W, in fairly large peaks, and would probably be a SiC or GaN device rated for such use. It needs to withstand full rectified voltage during capacitor ramp-up.
Both M2 and M1 need suitable heatsinks and fans. Probably the cheapest option is CPU+fan heatsinks for PCs - for CPUs that dissipate 100W at least.
A few more protection features would be desirable, such as M1 current limit proportional to OUT voltage, i.e. a limit set for a certain constant load resistance.
OA1 floats on the OUT potential - that's its VSS rail, and the VCC rail is 12V above OUT, generated by U1.
The capacitor bank is shown at the -50% tolerance. Nominally those would be 450μF capacitors, or about 125μF series equivalent. The ripple voltage is regulated by the VBLOW control loop, i.e. as the capacitors lose capacitance, the ripple voltage increases, its minimal voltage always maintaining regulation across M1.
Diodes D1-D4 should be avalanche rated, 2kV reverse voltage (or more).
Another approach uses a pre-regulator on the mains (input) side of the transformer, with an optocoupler to provide feedback. It's easier to implement, since we don't need a 1700V-rated pass element M1. A 500V transistor or mosfet will work fine on the primary side, for all line voltages up to 240Vrms nominal. For use with 120Vrms nominal. a 400V device is perfectly fine.
I won't be putting a schematic together here, but for some inspiration:
A schematic of an implemented pre-regulator mains-side driver from the Dabbledoo blog above:
And a schematic of the regulator that drives the optocoupler above from the secondary side - that's an excerpt from Valhalla 2701C service manual schematics:
