N-channel MOSFET specifications

Question

I am designing a circuit which uses a 3.3 V, 1 mA-sourceable GPIO pin to allow for power cycling a projector which takes 12 V and draws between 1-6 A. Those are pretty much the only requirements - ON-delay time does not need to be quick (can be a few seconds even). There is common ground between the controller and the projector. My plan is an N-channel enhancement MOSFET, where current flows when the GPIO is high, but there are a lot of different specs for MOSFETs I'm unsure about (using Digikey to get an idea of what parts are available), so I wanted to get a sanity check here. Curious if my understanding of the specification meanings, what values I need, and which specs are even relevant to my design is accurate. Below is a very quick and dirty circuit I plan on using - probably will have a current limiting resistor on the GPIO line.

• Vdss - max switching voltage: anything higher than 12V
• Id @ 25C - Max current that can flow through the MOSFET: 6A? That's the most the Load will ever draw.
• Drive Voltage (max Rds, min Rds) - Gate voltage where MOSFET first begins allowing current from Drain to Source, and gate voltage where it allows for drawing max current: something like 1.8, 4.5? I assume I would then have to check the datasheet to see what current Vgs of 3.3 V would allow to see if it's high enough, would maybe have to bump up the Id spec since 3.3 V isn't an option for the higher value.
• Rds on (max) @Id, Vgs - not sure exactly what this parameter means other than the specific Rds at that current and Vgs, my plan would just be to check datasheets and find minimal Rds @ Vgs=3.3 V.
• Vgs(th)(Max) @ Id - Vgs at which current begins getting let through: I guess in the 1.8-ish range? Probably not a driving spec for my design.
• Gate Charge - mainly drives switching speed: not relevant for me
• Vgs(max) - max Vgs the MOSFET can take: anything above 3.3 V really

That's pretty much it. Any help is appreciated!

Answer 1

If the data sheet specifies an \$\mathrm{R_{DS_{ON}}}\$ at 3.3V \${V_{gs}}\$ and that \$\mathrm{R_{DS_{ON}}}\$ is acceptable, then you're nearly good to go.

Then calculate the power dissipation with that \$\mathrm{R_{DS_{ON}}}\$ and full current. Then read the thermal specifications carefully and make sure that your transistor won't overheat. Some manufacturers give sensible power or current ratings to their device; others give a power rating that assumes the device pins are held at 25 degrees C.

It's really up to you to know the thermal resistance from junction to case or junction to thermal pad (depending on whether it's a surface-mount part or not). Then it's up to you to decide whether it'll overheat. You can't trust the manufacturer's rosy predictions on power handling.

Answer 2

For a low side switch from 3.3V you need a "logic level switch" where Vgs=3.3V will draw \$P=I^2RdsOn\$.

Normally* Vgs(th) <= 1/3 to 1/2 of Vdd worst case and dissipate no more than the junction temp rise with \$P*Rja= [W]*[°C/W]\$= temp rise above ambient T. Choose a <= 50°C rise for comfortable operation.

If the projector has a CMOS interface, something may get damaged when the inputs pull the signals up to +12V when the power turns on and causes "SCR latchup".

The simple solution is to use any NPN to pull down any Pch FET with perhaps RdsOn < 30 mOhm then any threshold will work. (2 to 4V or less)

The max DC current rating is only valid with a heatsink. Try here

Then to turn off parasitic inductance flyback protection, add a reverse silicon diode from output to ground.

RdsOn <= +50[°C]/6²[A] / Rja [²C/W]

For a Pch FET this has a max Vgs(the)=1.2V which satisfies < 50% of 3.3V so RdsOn may be ok and it's cheap $0.86 TO-220 (1pc.)