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I am currently studying DCDC stability analysis in LtSpice. Could you please check my phase margin calculation, am I right? And how about the gain margin calculation? Is it equal to infinity in my case? This buck converter I checked, works well in transient modeling. To calculate PM I put the AC probe source between the system output and the feedback resistive divider, and after simulation, I created a custom plot of Vout divided by Vin_m (opamp negative input voltage). Is that the correct way to calculate phase margin? According to my calculations, PM = ~22 degrees, and the crossover frequency = ~23 kHz. Bode plot with marker lines

UPD: I changed my schematic according to LvW suggestion, now I am not sure what net I should measure on the bode plot:

New schematicNew schematic bode plot

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    \$\begingroup\$ Are you using a switching circuit to which you've added an ac source for a .AC analysis? Ac analyses in SPICE only work for linear circuits, e.g. non-switching circuits. In your case, you will have to reconstruct your circuit with an averaged model - the PWM switch for instance - and then ac-sweep the whole thing. Look at the examples in this document from my webpage. You can also resort to the FRA capability of LTspice but that is quite tedious. In your case, an averaged model is the right way to go. \$\endgroup\$ Commented Jun 17, 2022 at 13:53
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    \$\begingroup\$ Independent on the problems as mentioned by Verbal Kint, you loop gain simulation is NOT correct. You must break the loop (for introducing a test signal) at a point where a very small source resistance (e.g. opamp output) was connected to a much larger load impedance. Otherwise you cannot simulate the correct loading conditions of the closed loop. \$\endgroup\$
    – LvW
    Commented Jun 17, 2022 at 14:25
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    \$\begingroup\$ Sounds like a duplicate. \$\endgroup\$ Commented Jun 18, 2022 at 12:52

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