I guess I am trying to figure out why we wouldn't just consolidate these into one single 22.11uF capacitor.
My initial understanding was that each capacitor was better at filtering certain frequencies, but the 22uF capacitor should theoretically always be better at filtering than the 0.1uF and 0.01uF capacitors.
Am I missing something?
Each size of capacitor is good at filtering a particular range of frequencies of supply noise (since each capacitor has parasitic inductance forming sort of an LC band-pass filter), together they have a wider range. Good explanation by EEVBlog: https://www.youtube.com/watch?v=BcJ6UdDx1vg
There are several reasons it could be shown this way.
The capacitors are in different locations. There may be a 22uF where the +5 V connects to the board, and several 0.1uF caps at other points on the 5 V bus, such as near the power pins of ICs. This was often done on TTL logic boards, a larger cap as a reservoir and smaller caps for decoupling placed right near the ICs to catch the glitches where they originate, 0.1uF is a very common value for this purpose. Sometimes someone will just put them all together in one spot on the schematic instead of showing them in a way that reflects their physical locations.
They are using different types of capacitors that have different impedance characteristics to handle noise at various frequencies better.
Each capacitor has different reactance value, with this reactance value we can earn good filtering. Reactance formula is: Xc = 1 / (2.pi.f.C).
Thanks to different capacitor values your Xc / Frequency graph will be like this (Yellow one is the result response)
If the capacitors behaved ideally, you would be correct. However the capacitors don't behave ideally and lower value capacitors have lower impedance at higher frequencies in general (but, of course, because of the low capacitance, they don't have low impedance at low frequencies).
Just to give you an idea of what an accurate (but simplified because it's linear) model of a 22uF capacitor looks like, here is the Murata SPICE model of a 22uF/6.3V capacitor at 20°C and 5V bias.
At that one temperature and voltage it is simulated by 30 lumped components (redrawing that into a more readable schematic is left as an exercise, you would just connect all like node numbers together).
The net result looks like this:
And (not simulated in the linear SPICE model) the capacitance vs. voltage curve looks like this:
As you can see the capacitor has increasing impedance above some hundreds of kHz. In some cases this single capacitor may be sufficient since it doesn't get above 1\$\Omega\$ until 500MHz or so, but for a high speed logic circuit you will probably want to parallel it with at least one lower value capacitor.
Note also that the 22uF ends up being around 7uF (basically C1 in the SPICE model) at 5V bias. This linear SPICE model is accurate only for small voltage excursions around the 5V bias level. Temperature changes from 20°C will also have a significant effect on the bulk capacitance (about +/-10% in a nonlinear fashion over the temperature range).
(Images generated from Murata's online tools and LTspice).
The low value parts are most effective very close to the supply pin and ground in question. It's not unusual to have a single high value capacitor and multiples of the lower values (either single or in pairs etc.) distributed around physically so the are very close (mm) to various supply pins that are fed from a single rail.
