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So I'm designing a two-layer PCB and I'm very inexperienced. A third-party company will fabricate them.

Now, I have a PTH part with a number of closely spaced pins (and there is no SMD equivalent of this part). I can greatly simplify routing by running traces between certain pins. However, I can't do this unless I eliminate the pads for certain pins on one side of the board (to make clearance for the trace).

If I do this, that means that for those pins, only one side of the PCB can get solder even though the pin will stick through. So my question is: Given that this board's fabrication, population, and soldering is automated, can I leave pads off of one side of a PTH connection and run traces near it without issue? I guess I'm kind of imagining like, solder leaking through the holes or some weird mechanical issue with the partially-supported pins.

Or should I just come up with a more complex routing that doesn't pass in between closely spaced pins? Or ... maybe I can just eliminate like half the pad on one side of the board or something like that? Or, is there a different fabrication process that I could look for? I just don't really have any concept of the quirks that come up in fabrication, so I can't really make a good judgment call.

Unsure if relevant but expected operating temperature range is 0 - 40 °C, varying moisture (exposed to outdoor humidity but not rain water). No significant mechanical shocks or stresses expected (the board does have some jacks on it but they're all strain relieved with mounting points).

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    \$\begingroup\$ None of the information you gave about the process is even close to relevant for this question, but the answer is probably not. But ask the fab, maybe they'll be able to anyway. \$\endgroup\$
    – Hearth
    Commented Nov 23, 2021 at 20:53
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    \$\begingroup\$ Agreed, this is something the fabricator has to determine. \$\endgroup\$
    – rdtsc
    Commented Nov 23, 2021 at 20:54
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    \$\begingroup\$ Would you be able to just shrink the diameter of the pads to the fab's stated minimum annular ring capability? \$\endgroup\$
    – DamienWontContributeToAITheft
    Commented Nov 23, 2021 at 20:58
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    \$\begingroup\$ @JasonC nice, that's pretty close! I would only reduce the diameter on the side that won't get solder, as the minimum annular ring may not be wide enough for a good PTH solder joint. \$\endgroup\$
    – DamienWontContributeToAITheft
    Commented Nov 23, 2021 at 21:16
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    \$\begingroup\$ With such tight clearances you might also want to double-check how you compute the annular ring size, you may have to add the hole plating thickness to the finished hole size. \$\endgroup\$
    – DamienWontContributeToAITheft
    Commented Nov 23, 2021 at 21:23

2 Answers 2

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I asked the inspection person here (I work for a contract manufacturer) and I was told that it will be flag as a defect if inspected by IPC-610 (Class 1,2 or 3). So what you're trying to do is not acceptable. Damage to one of the pads (top or bottom) is also a defect.

I have seen boards where the pad is not a perfect circle (like an ellipse) to make space for traces to go in between. This seems acceptable.

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  • \$\begingroup\$ Thanks; and this fabricator does say they stick to IPC-610 Class 2 requirements. \$\endgroup\$
    – Jason C
    Commented Nov 23, 2021 at 22:01
  • \$\begingroup\$ On the other hand, leaving out the pad on the middle layers of a 4-layer PCB is typically acceptable (it's called non-functional pad removal). And it is also ok to have a larger pad on one side and the manufacturer minimum annular ring sized pad on other side. \$\endgroup\$
    – jpa
    Commented Nov 24, 2021 at 10:48
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That's bad practice.

Your PCB manufacturer might ask you to add the missing copper pad.

PCB manufacturers, for manufacturing purposes, want 2 copper pads vertically aligned: one on the top layer and the other on the bottom layer.

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