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I am working on a design a transmission system in FPGA. SPI slave/master are connected with CPU via DMA. I would like to reach a speed up to 100 Mbits/s and looking a block from IP catalogue (VIVADO) for DMA.

Depends on SPI mode ( stream or memory mapped), I have to use different DMA blocks

What is a difference between SPI stream and SPI memory mapped? Are they designed differently?

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    \$\begingroup\$ My guess is ‘memory mapped’ translates the address supplied to the block and manages the spi protocol for memory devices - eg serial flash. These devices have a common protocol cmd/addr bytes/read data etc. \$\endgroup\$
    – Kartman
    Commented Aug 23, 2021 at 8:12
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    \$\begingroup\$ You need to read the documentation of the IP blocks. We don't know which IP blocks from which manufacturer you are buying, so it is unlikely that anyone is able to access the said documentation and quote you the differences. We aĺso don't know what data will the system transfer, as memory mapping is only useful if the mapped slave is a memory chip and the host needs to access it like any other memory for data storage or execution of code. \$\endgroup\$
    – Justme
    Commented Aug 23, 2021 at 9:20

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The difference is in the interface how the CPU sees the SPI device, as a SPI controller peripheral or just plain memory. There is no difference to the SPI bus itself. And unless the SPI slave device is a SPI flash memory chip you want to execute code from, or a SPI RAM chip you want to use like any other memory, it makes no sense to memory map it.

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  • \$\begingroup\$ in my design SPI slave/master are peripheral. in such case, is it SPI stream? \$\endgroup\$
    – Anna Koroleva
    Commented Aug 24, 2021 at 6:28
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The component that takes a streaming interface and implements SPI is the core component.

If you want to fetch the data from memory via DMA, you also need a DMA controller with a streaming interface and attach that.

You can either do this explicitly with two components, or use an integrated component that also sets the parameters for the DMA controller according to the configured SPI parameters.

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