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i was reading about the new 2nm chip IBM created and through some reading i learned that the "nm" part does not refer to the actual gate length like it did many years ago. Can anyone tell me what it really refers to?I have seen terms like metal half-pitch and others like it but they seem to be inconsistent from architecture to architecture. Concluding, the answer i am looking for is, for example, in a 3nm node what could the transistor gate length be, would it be very far off ? Have they reached a minimum gate length that cannot be further shrinked due to physical limitations?

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  • \$\begingroup\$ The physical limitations include the high voltage required in the process and the dielectric breakdown damage during the process even at 75kV/mm is only 75mV/nm \$\endgroup\$ Commented May 30, 2021 at 6:39
  • \$\begingroup\$ Jmk, This seems to me the kind of question, if I had it myself, where I'd just contact IBM, directly. I've found them to be very forth-coming about serious questions from someone actually curious. If you can track down the organization somehow, just give them a phone call and work through the system to find someone helpful. Or else write them if time isn't as important. But I bet you could get patched directly to someone who will know enough to answer most of your questions. And I don't think they'd act coy about it. My contact with IBM has been very positive about leading edge questions. \$\endgroup\$
    – jonk
    Commented May 30, 2021 at 7:06

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You are correct, the term isn’t used consistently. In general it refers to the smallest feature that is used in the design. Since many or most features are larger than this it is not a precise term.

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  • \$\begingroup\$ Is there any way i could get an estimate of gate length for commercial chips lik from current intel chips or are they not publicly available ? \$\endgroup\$
    – Jmk
    Commented May 30, 2021 at 6:33
  • \$\begingroup\$ I don’t know if these are available, but if the feature size is a few nm in one direction then it would make sense that the other direction isn’t many times bigger. Perhaps divide the die area of a microprocessor by the transistor count, that will give you a maximum size per transistor; some will be larger than others and some space will be used for other purposes so you can estimate from there. \$\endgroup\$
    – Frog
    Commented May 30, 2021 at 10:01

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