Depletion Region Capacitance in MOSFET

Question

Hi, I would like to ask about the behavior of a MOSFET as a capacitor, particularly at the onset of inversion/weak inversion - see Fig 2.6(c)

• At this stage in Fig 2.6(c), there is positive charge at the gate metal/poly contact, then an insulator oxide and then negative ions (positive holes have been repelled) - this is the Cox capacitor in the schematic overlaying.
• My confusion is regarding the Cdep - depletion region capacitor. What are the two 'plates' or regions of charge accumulation that form the Cdep capacacitor? I assume one is the negative ions (sharing a plate with Cox) and the other is the repelled positive holes. But then, if you see my drawn schematic, that doesn't make sense, since the + charges are on top and negative ions should be on top?

Can someone explain to me how Razavi is extrapolating from the device physics that there is a Cdep capacitance? What are the two regions of charge that form Cdep? Is one 'plate' shared with Cox?

Answer 1

In Fig 2.6(c), it's not negative ions that are under the gate, but negative carriers (electrons) that are mobile and free to move in their plane.

Underneath that there is an insulating depletion region (fixed negative charge from the p-type material where holes have been repelled from), and underneath that there is conductive p-type material. The depletion cap is from the top electron layer as one plate; the depletion region as the non-conductive dielectric, and the conductive p-type as the bottom plate.

Because there is a non-movable charge in the depletion region, the electric field in the depletion capacitance is not equal to E = V/d. There is no requirement that the '+' plate have '+' carriers on it.

Answer 2

There are a few ways of looking at the \$C_{dep}\$ capacitance. One way has been presented in another answer, but I think the following makes more sense.

In short, you don't actually need a plate at the node between \$C_{dep}\$ and \$C_{ox}\$. You arguably don't have one when operating in depletion mode.

The gate capacitance per unit area is fixed: \$C_{ox}^\prime=\epsilon_{ox}/t_{ox}\$. This is the capacitance of a MOS cap in both accumulation and inversion modes. But in depletion mode there is an extension of the dielectric: the depletion region. Adding this extra dielectric reduces the capacitance, but it isn't as simple as just increasing \$t_{ox}\$ in the equation because the semiconductor and the oxide have different permittivity. A capacitor isn't required to have a uniform dielectric permittivity, and here is one such example. You can spend some time deriving the equation for such a capacitor, and you end up with \$\frac{1}{C^\prime}=\frac{t_{ox}}{\epsilon_{ox}}+\frac{t_{dep}}{\epsilon_s}\$. Which is identical to the equation for two capacitors in series.

You don't need a plate at the node between these two capacitors. If you do have a plate there, it would be at a constant charge anyway and therefore wouldn't do anything. This can occur when operating a MOS CAP at high frequency in inversion mode, for example.

As a final note, remember that "depletion capacitance", and MOS cap capacitance in general, is a measurement of differential capacitance. That is \$C=dQ/dV\$. All those ionized dopants in the depletion region don't really count for anything, other than to set the depletion region width. They aren't charges on your depletion region (differential) capacitor.