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The Drain to Source leakage current Idss at Zero Gate voltage (Vgs= 0) is normally 1uA(max). However the relationship (or Graph) with Vds (Drain-source voltage) is not mentioned in Datasheet.

Que:

  1. What is the relationship of Idss vs Vds when Vgs = 0 for PMOS (P-channel MOSFET)? Linearly/Exponentially descreseing with Vds?
  2. When Vgs=0 and Vds = 5, what will be Idss= ?
  3. When Vgs=0 and Vds = 0, Idss=0? (Where Vg !=0)
  4. Will Idss decrease if Vgs is made positive e.g. +2V ?

I have attached Datasheet snippet of DMP2005UFG enter image description here

Thanks

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  • \$\begingroup\$ Good question; I mean it can't be 1 uA when VDS is zero volts so, how does it grow to become 1 uA as VDS rises above 0 volts. I have looked for this in the past and concluded that it has the same general shape as the characteristic when VGS is non zero. But that was based on intuitions rather than hard facts. \$\endgroup\$
    – Andy aka
    Commented Feb 17, 2021 at 10:49
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    \$\begingroup\$ See chapter 14 of assets.nexperia.com/documents/user-manual/… Leakage of small-signal MOSFETs \$\endgroup\$
    – Peter Smith
    Commented Feb 17, 2021 at 15:05
  • \$\begingroup\$ Thank you @PeterSmith this App note provides insight into Leakage characteristics and answers many questions. \$\endgroup\$
    – Electric Monkey
    Commented Feb 17, 2021 at 15:47
  • \$\begingroup\$ In summary: at Vgs=0, decreasing Vds will decrease Idss but marginally. In comparison Temperature has huge impact on Idss value. Lower the temperature lower the Idss. \$\endgroup\$
    – Electric Monkey
    Commented Feb 17, 2021 at 15:51

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