In an NMOS, does current flow from source to drain or vice-versa?
This Wikipedia page is confusing me: http://en.wikipedia.org/wiki/MOSFET
The above image confuses me. For the N-channel, it shows the diode's polarity going towards source in some, but away from the source in others.
I'm wondering which terminal should be connected to the power source (i.e. the positive battery terminal) and which should be connected to the power user (i.e. electric motor).
Conventional current flows from Drain to Source in an N Channel MOSFET.
The arrow shows body diode direction in a MOSFET with a parasitic diode between source and drain via the substrate. This diode is missing in silicon on sapphire.
2a is a JFet so different topology.
2d is a MOSFET with no body diode. I've never seen one.
2e is a depletion mode FET - it is on with no gate voltage and takes negative voltage to turn the FET off. So the diode has the other polarity, otherwise the body diode would conduct whenever there was gate voltage.
When a channel exists in a MOSFET, current can flow from drain to source or from source to drain - it's a function of how the device is connected in the circuit. The conduction channel has no intrinsic polarity - it's kind of like a resistor in that regard.
The intrinsic body diode inside the MOSFET is in parallel with the conduction channel, however. When the conduction channel is present, the diode is shunted and current flows through the path of least resistance (the channel). When the channel is off, the diode is in circuit and will either conduct or block depending on the drain-source current polarity.
As your picture shows, there are both N-channel and P-channel devices, as well as enhancement mode and depletion mode devices. In all of these cases, current can flow from source to drain as well as from drain to source - it's just a matter of how the device is connected in the circuit.
Your picture does not show the intrinsic diode in the devices - the arrow point towards or away from the gate is an indication of the channel type (N-channel points towards the gate, P-channel points away from the gate).
This symbol shows you the inherent diode between drain and source.
N-channel enhancement devices need a voltage on the gate higher than the source in order to create a conduction channel. (Enhancement devices don't have a channel automatically, and need gate voltage to create one - because it's N-channel \$V_{gate} > V_{source}\$ for this to happen.)
P-channel enhancement devices need a voltage on the gate lower than the source in order to create a conduction channel. (Enhancement devices don't have a channel automatically, and need gate voltage to create one - because it's P-channel \$V_{gate} < V_{source}\$ for this to happen.)
N-channel delpetion devices have a channel by default, and need a voltage on the gate lower than the source in order to turn the channel off. The channel can be widened to a certain extent by increasing the gate-to-source voltage above 0.
P-channel depletion devices also have a channel by default, and need a voltage on the gate higher than the source in order to turn the channel off. The channel can be widened to a certain extent by decreasing the gate-to-source voltage below 0.
with NMOS, current flows from Drain-to-source (arrow points away from device at the Source) with PMOS, current flows from Source-to-drain (arrow points to the device at the Source)
P-channel refers to the type of channel that forms underneath the "gate". The P signifies that the channel forms on P-type semiconductor, while the N signifies an N-type semiconductor.
It is conventional to see arrows on the "source" terminal of the transistor. Conversely, simplified schematic drawings of digital transistors typically do not have arrows. The PMOS transistor will instead have a bubble at the gate terminal while the NMOS won't have a bubble. Operationally MOS transistors have the same basic operating behavior in analog and digital applications but they differ in how they're applied and where their current-voltage behavior is utilized.
The transistor is a four-terminal device, gate, drain, source, and body. A simplified view of the transistor turns it into a 3-terminal device ignoring the body terminal. In reality there is a phenomenon known as the body-effect which introduces additional complexity in calculating the quiescent operating point of a transistor. The q-point signifies the current-voltage (I-V) operating point of the transistor.
Yes, the current can flow from drain to source and vice-versa. To simplify it even further, I would like to add a bit to just what @Adam Lawrence has mentioned.
I am sure you are familiar with the cross section of the CMOS transistor. You can see that the cross section of the Mosfet is EVEN from the center vertical line. So, whichever (out of the two terminals on sides of nmos) terminal has higher voltage than the other terminal, that becomes your drain (for NMOS) and the other terminal with lower voltage becomes the source (for nmos). The reverse is followed for pmos.
Nevertheless, be careful when buying/dealing with discrete 3 pin Mosfets (i.e SiHG47N60EF) where internal bulk is already connected to the source(for nmos) or to the drain (for pmos) internally. This makes the mosfet pins predefine as mentioned in the datasheet. In that case, the above is still true that higher voltage terminal is drain and lower voltage terminal is source for nmos. However, if you apply higher voltage to the predefined source as mentioned in the datasheet, the threshold voltages will not be same as mentioned in datasheet. And your transistor will not behave as same as what is specified in the datasheet.
All MOSFETs are fundamentally blocking in both directions. Their construction looks like this (N-MOSFET):
simulate this circuit – Schematic created using CircuitLab
The variable resistor depicts the inversion layer formed under the gate. This is essentially an open circuit for regular enhancement mode MOSFET with no gate-to-source voltage.
A couple of obsevations follow from this picture:
The last bullet is the important one for the application of MOSFETs in circuits. They only provide a useful transistor function if they can block or conduct depending on the gate voltage. Therefore, N-MOSFETs are used with their drain terminals positive and sources negative.
The 'source' means the source of the majority charge carriers of the device. If it is NMOS it would be the source of electrons. If it is PMOS it would be the source of holes.
The 'drain' means the terminal through which the majority charge carriers of the device leave the device. If it is NMOS the drain will be draining the electrons out of the device. If it is PMOS the drain will be draining the holes out of the device.
The conventional current follows the direction of holes. While conventional current direction is opposite the flow of electrons.
