This gigabit Ethernet NIC has a checkerboard pattern out of copper etched on the PCB:
Each square is electrically isolated. What's the point of adding these? I guess that the PCB isn't filled with a copper plane due to cost concerns, but why don't leave it empty then?
That's called copper thieving. It helps balance the amount of copper on the outer layers which makes the etching process easier. Basically it helps them avoid over or under etching the board.
Usually I'll have a note on my board files that I send to the fab house like: Fab may add copper thieving at their discretion so long as it is at least 100 mil from any major feature. Which basically means theive all you want but don't get it near any of my signals.
Why not just fill the outer layers with copper pour then? It's not cost, etching a pcb is not an additive process. They start with a full sheet of copper and burn it away. Having copper pour all over the place close to my signals!!! That would cause impedance discontinuities everywhere.
Plus depending on how it's routed you don't want to unbalance your board, for example having plenty of copper pour on the bottom but little on the top. That will lead you into having your board cup and curl when it goes through the oven.
The addition of dummy copper pads to the open spaces on the outer layers of a PCB in order to provide a uniform distribution of copper across the entire surface. The purpose is to insure plating currents are uniform across the whole surface when plating copper onto the PCB surface and in the holes. This helps insure a uniform plating thickness across the surface and in the holes.
– Ritchey, L. (2003), Right the First Time Vol.1 [p.252]
[...] A common problem with the pattern plating process is the lack of uniform distribution of copper surfaces to be plated across the entire panel surface because component density varies across the surface. As a result, where there are few features to be plated, the plating current will be dense and the thickness of the plated copper will be much greater than in areas where there are many features, such as a BGA pattern or a high pin count connector. The primary problem with this is variations in finished hole size--a big issue when press fit connectors are part of the assembly. To solve this problem, a pattern of dummy pads can be added in areas where there are few features. This is called thieving because it robs plating current from the other features in the area. The objective is to make sure the plating current is even across the panel so that copper is plated to a uniform thickness. Figure 4.23 is an example of a PCB with thieving added to the outer layers. An important thing to remember when thieving is added to the outer layers of a PCB is if there are controlled impedance traces in the next layer down, layer 2 or n-1, thieving must not be placed over those traces or thieving must be accounted for in the trace design notes (i.e., noting where thieving is possible and where it is not).
– Ritchey, L. (2006), Right the First Time Vol.2 [p.56]
