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I'm trying to bias the inputs of an op amp, I can't simply use a resistor because there is a tiny cap at the input and it forms a voltage divider and I get no signal through.

Can I use a JFET like this? I have the gate attached to the bias voltage (1.65V) and the source connected to the input and the drain to the op amp. It works in pspice but I'm not sure if this is a proper JFET application. I haven't really seen one used like this before.

The source is floating but it rises to the bias voltage.

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    \$\begingroup\$ Make sure you test your circuit with an op-amp model that includes input bias current \$\endgroup\$
    – sstobbe
    Commented Jul 3, 2019 at 17:21
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    \$\begingroup\$ Trying random stuff until it seems to work in the simulator is a bad way to design a circuit. What is the minimum frequency and maximum amplitude of the signal you want to amplify? What is the part number of the op amp? \$\endgroup\$ Commented Jul 3, 2019 at 18:26

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This is called a common-gate configuration, it is a way to use JFET transistors for isolation and high output impedance; however because your op-amp will try to become ideal and drive the inverting input to the same voltage level as the noninverting input, would you not be able to just use a resistive divider on the inverting input? This will force your noninverting input to the same bias point, as long as you use large resistors.

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    \$\begingroup\$ JFETs don't have a base. They are field effect transistors, and have a gate. \$\endgroup\$
    – JRE
    Commented Jul 3, 2019 at 16:18
  • \$\begingroup\$ Thanks. Using large resistors drives up my thermal noise and current noise on the op amp to unusable levels. \$\endgroup\$ Commented Jul 3, 2019 at 16:46
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    \$\begingroup\$ @JRE yes, i agree with you; i was in the midst of editing when I had to step away from my computer. The principle is unchanged however. \$\endgroup\$
    – Jeff Roman
    Commented Jul 3, 2019 at 17:31

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