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I have designed a PCB (four layer) having SIM7600I LTE Module. The Stackup is:

  1. Signal & Component Layer with Ground Pour
  2. Internal Ground Power Plane
  3. Internal Power Power Plane (3V3, 4V and 1V8)
  4. Signal & Component Bottom Layer with Ground Pour

The datasheet says:

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I have followed the datasheet guide and included approx. 700uF capacitors (considering the load transient response of AP6503 as it can handle the transient with 200mV voltage drop):

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I have been using AP6503 Buck Converter to step down from 5V to 4V. The schematics of power design specially for LTE module is given below:

enter image description here

And I have placed 700uF capacitors near to Module's Power Pin.

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The Power traces from Buck Converter to LTE Module is on Internal Power Plane (Layer 3).

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After assembling the PCB and testing it, I found out it is working perfectly but after few days, I put probe of my oscilloscope to the power pin of LTE module and saw weird undershoot and overshoots. I am not sure the culprit behind it. The spikes are of 1V. I want to resolve this issue in my next iteration but I am not sure who is the culprit. I have been using these capacitors near to power pin of LTE Module.

  1. 470uF Aluminium Polymer 11mohm 16V X 1
  2. 100uF Tantalum 100mohm 16V X 2
  3. 100nF Ceramic Capacitor X 1
  4. 33pF Ceramic Capacitor X 1

The pictures of the noise on power pins of LTE Module are:

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enter image description here

I want help in understanding what I did wrong. I think I have followed the datasheets and took measures to avoid any problem after PCB fabrication. Please help.

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    \$\begingroup\$ Please show your probe setup. Probing with a large inductance ground lead will cause red herring oscillations. \$\endgroup\$
    – Kevin Kruse
    Commented Mar 21, 2019 at 13:35

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