TTL logic ring oscillator

Question

I tried building my own ring oscillator on a breadboard and ran into some issues. After several failed designs (mostly using 2 inverters - insipired by the CD4060 oscillator), I tried to go simple and go with a classic 3 gate design as shown.

I figured based on that circuit that I could use TTL inverters (74 HC 04) with equal resistors and capacitors (R = 1 k ohms, C = 1 micro farads) and then buffering the output in order to see some oscillation (I was aiming for low frequency, around 1 Hz).

I built the following circuit which did not oscillate. I measured the voltage across the capacitors whilst trying to debug the circuit and it was around 1.8 V constantly, across all three capacitors (5V supply voltage).

Finally, after some more googling, I happened upon this Ring oscillators which described the following circuit, using the same 74 HC 04 IC that I used.

Due to a lack of available parts I replaced the 4,7 Mohm resistors with 1 Mohm ones and the 100 nanoF capacitor with a 10 nF capacitor and I could see oscillation, the circuit did indeed work as advertised.

So my questions are why did the first circuit not work? What was wrong with it? What made the second one work? And how do you calculate the frequency of such an oscillator? Do the capacitors not being non-polarized have something to do with it?

Answer 1

I am assuming that you do not have an oscilloscope, and are looking for visible indicators of oscillation. If I'm wrong, you can ignore the following.

The answer is (I suspect) pretty simple: in both cases there was nothing wrong with the circuit and it was working just fine.

Of course, with the RC values you've got (1 kohm/1 uF) I'd expect an oscillation frequency in excess of 30 Hz, so the LED in the second circuit would appear to be on steadily.

The test for this is to measure the capacitor values again, but this time with the meter set to AC rather than DC. If the circuit is really not oscillating, the meter will show 0 volts, or pretty close. If it shows about 2 volts, you know it's working. Alternatively, for the second circuit, observe the LED brightness. Now disconnect the input of the Schmitt trigger from Vout and ground it. If the LED brightness increases, you know that the LED drive was not on 100% of the time, and the circuit was oscillating.

Also, for what it's worth, for relatively low oscillator frequencies all of the gates should be Schmitt triggers, such as a 74(HC)14. Logic gates have been known to do Bad Things when their inputs vary slowly.

Answer 2

First reason would be if the Vout node is stuck at an intermediate voltage rather than perfect 0V or Vcc. Hence for that the ring oscillators generally have a enable signal and a nand gate instead of the first inverter to define the state. After some time the enable is switched OFF and the circuit will start with some good rail voltages at its nodes.

In your first circuit, it's like a open drain situation, where you're trying to discharge the node voltage held by the pull up resistor using the nMos. For this, the nMos is supposed to be quite large in size (W) to provide the necessary Idrive. If the nMos is too weak compared to the resistor, its possible that the resistor wins the contention and the node will be never discharged which is what you're seeing.

Regarding the voltages settling at 1.8V, you can see that the nMos is fully ON and the pull up resistor is quite small (Ron of nMos is quite comparable to pull up resistor value). Because of this you're seeing a potential divider kind of circuit between the pull up resistor and nMos. Increasing your pull up resistor value to a huge one will help, but the charging time of the node will immensely increase which won't allow you to get good duty cycle square wave.

In the third circuit, adding a pull up resistor is meaningless since you can always size the pMos of the inverter and choose appropriate Capacitance to get required frequency wave. You may need to add series R with your inverter output.(like a RC circuit)

Answer 3

Have you even looked at the internal circuit of the HCMOS (not TTL) inverter? There are two big differences from the N-MOS transistor in the first circuit, one obvious and one more subtle.

The internal circuit, as stated in the datasheet, is 3 stages of two transistor inverters.

First is the push-pull nature of the output. It's made this way so it will use little power in quiescent conditions and also charge/discharge load capacitance quickly. So your pullup resistors do nothing useful in parallel with the P-MOS when going high- the transistor conducts perhaps tens of mA so your 1uF cap will charge and discharge fast enough to give you several kHz oscillation. The relatively high current (both from the cap and shoot-through) means that your lack of a proper decoupling capacitor could cause oscillatory things to happen at many MHz. Put a decent oscilloscope on there and you'll see that 'constant 1.8V' is actually high frequency oscillation (also illustrating the better sink than source capability of the inverter).

More subtly, the 3-gate delay inside each inverter itself has enough phase delay and a lot of gain so that all kinds of ugly oscillation modes are possible. That's why you will have subtle problems if you try to bias an inverter into linear mode to make, for example, a Pierce oscillator. Use a 74HCU04 which is Unbuffered and has only a single stage.

If you want to make the classic phase shift oscillator either use discrete NMOS transistors or use the transistors in two CD4007s.

Your third circuit also has the possibility of ringing on transitions if you don't use unbuffered inverters.

Another thing you could try with your 2nd circuit is to move the resistors from pull-ups to series from the output to the capacitor. It may or may not 'appear' to work with your buffered gate.