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A chicken bit "is a bit on a chip that can be used by the designer to disable one of the features of the chip if it proves faulty or negatively impacts performance."

Would space-qualified logic components leave this feature in, or would the final design "best practice" of space-qualified IC take redundant features controlled by a chicken bit out of the final die?

My guess is that, if a feature with undesirable performance is left in the final die, the chicken bit could be susceptible to a bit-flip by an SEE (single event effect) or other radiation effects, thus running the risk of activating the undesired feature, and possibly affecting the mission in space.

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    \$\begingroup\$ Considering this is disabled logic, and the SEE is analog, I would not expect any more susceptibility to disabled logic than an unused Set tied low. I would expect glitches on output registers connected to long cables to propagate back into anserial register however causing inserted EMI to be cascaded such as SIPO or PISO register. So a SEE event such as a gamma pulse is not different than a motor arc except the rise time might be a pico second instead of nanoseconds., so robust filtering and shielding is mandatory \$\endgroup\$
    – Tony Stewart EE75
    Commented Nov 15, 2016 at 19:53
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    \$\begingroup\$ If a SEE causes a bit-flip, how could it be analogue? \$\endgroup\$
    – My Other Head
    Commented Nov 15, 2016 at 19:59
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    \$\begingroup\$ SEE is caused by analog defect with a digital result. Analog in a sense like silicon contaminant or EMP or ESD etc. In fact all logic is analog. A SEE is like a medical term for idiopathic. and does not target Chicken bits any more than used logic. A chicken bit is just an unproven logic cct that was disabled for some logical reason, but something that makes it vulnerable to EMC. When ATE test with ICT they also test unused gates by back driving, the same would be done for any unused cct in a good ATE design at factory. \$\endgroup\$
    – Tony Stewart EE75
    Commented Nov 15, 2016 at 20:08

2 Answers 2

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The definition of chicken bit in Wiktionary is incorrect, and the extension by OP [as hardwired] is even more wrong.

The chicken bit is a configuration bit (software configurable! and usually undocumented) that is incorporated into a design to disable a WORKAROUND of some issue discovered during bring-up of early silicon stepping. The bit is usually incorporated because the pre-silicon validation/verification of the workaround is usually incomplete at the moment of tape-out of a new chip stepping (typically due time-to-market constraint), and all consequences and possible side effects of the workaround are not known yet, as compared to much more verified initial design. The chicken bit is a way to undo the entire workaround in cases when some new side effects would be discovered in process of more thorough and complete post-silicon validation.

As such, the chicken bit is no different from other configuration bits for other hardware features, and should not cause any special concern. In modern designs the essential configuration bits are protected by various special lock-unlock-sync mechanisms, so the run-time effect of SEE events on hardware configuration is minimized.

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  • \$\begingroup\$ removed my extension. \$\endgroup\$
    – My Other Head
    Commented Nov 15, 2016 at 22:33
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I can't speak for any specific IC, but I know that bit flips due to radiation are considered for terrestrial ICs as well. I have a colleague who would regularly take our automotive-grade products to a national lab to test for SRAM bit flips. Chicken bits can use protection techniques such as majority voting or ECC, just like any other logic. So I wouldn't think there's anything special about a few extra configuration bits or some unused logic.

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