I'm designing a large adjustable bench power supply (up to 250W per channel, 50V max). My current thoughts about the design are three stages:
A unregulated supply at ~60VDC, up to 5A out. Using a mains transformer to generate the 60VDC.
A buck converter that takes me from ~60VDC, up to 5A, to ~1.5V above the requested (adjustable) voltage.
Finally, a linear regulator to take me from the output of the buck converter to the requested voltage.
The linear regulator has to be able to operate at 50V, 5A. Because of this, I'm designing my own. (I'm not aware of any off the shelf solutions).
I know that you can get close to linear regulator noise levels using this topology (unregulated to buck to linear regulator), however you have to pay attention to the noise in your buck regulator and match it with the power supply rejection of your linear regulator.
What are the things that I should pay attention to when designing this system? I know you can reduce the noise in a SMPS by turning on the FETs slower, and that typical linear regulators are better at rejecting low frequencies than higher frequencies. I also know I can use a low pass filter to help filter out the high frequencies of the SMPS, at the cost of ~.5V and some heat.
Are there other things I should take into account? Does synchronous vs. asynchronous matter? Should I design a PI filter after the SMPS to filter out the high noise? Does the op-amp or MOSFET selection of the linear supply change its PSRR frequency response? I would expect the op-amp matters, but the FET less so, what are the figures of merit I should be looking for?