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I'm attempting to design a system with 2 CAN transceivers, a High speed and Low speed that use the same CANH and CANL lines, like so:

enter image description here

I was planning on using 4 MOSFETs or 4 Relays connected to the CANH and CANL lines of each transceiver and having the PIC control the MOSFETs or Relays to disconnect one transceiver and leave the other connected.

However, I believe that CAN is sensitive with its termination resistance and adding additional components may be harmful to the signal.

What would be a good way to control which transceiver is connected?

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    \$\begingroup\$ Why can't you just logically disable the interface that isn't being used, but leave both physically connected all the time? Otherwise, why not just use a single DPDT relay? \$\endgroup\$
    – Dave Tweed
    Commented Mar 19, 2014 at 15:46
  • \$\begingroup\$ @DaveTweed I did consider logically disabling, however I'm not very familiar with CAN and wasn't sure what caveats may occur with the second chip wired onto the CANH and CANL nodes. Relays are starting to sound like a better and better option. Thanks for your insight. \$\endgroup\$ Commented Mar 19, 2014 at 15:50
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    \$\begingroup\$ Can you explain why you can't use just one transceiver? \$\endgroup\$
    – user28910
    Commented Mar 19, 2014 at 18:33
  • \$\begingroup\$ @user28910 The low speed transceiver apparently has low fault tolerance characteristics that my group wants implemented in the design \$\endgroup\$ Commented Mar 19, 2014 at 21:01
  • \$\begingroup\$ If you want fault tolerance, why bother with the high speed option? \$\endgroup\$ Commented Mar 20, 2014 at 22:36

2 Answers 2

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You will most likely want to have two separate connectors for the high-speed and fault-tolerant CAN. To use the same connector seems like asking for trouble, because of the different voltage levels. Especially if you are going to have some sort of noise filter with diodes etc, you might need to implement two different ones. So don't mix the CAN Hi and Low lines from the 2 different transceivers.

If you have the option to pick a MCU with 2 CAN controllers on-chip, that would probably be a good solution.

If not, you would have to pick which transceiver that should be active in runtime. The easiest way is probably to switch the data lines on the CPU side from one transceiver to the other. Between the CPU and the transceiver you've just got plain digital logic, so you should be able to use any kind of demux for it. It shouldn't affect any of the two buses.

(Using relays to switch high-speed communication data lines is never a good idea: they are far too slow and you get various electromechanical issues that you have to compensate for with filters.)

Important: the transceiver which isn't active should be left "hanging", because the transceivers internally pull the signal to the passive voltage when there's no data traffic. So don't go add pull resistors anywhere or you might mess up the external bus communication on the transceiver which isn't active.

But that's really an ad hoc solution. You should only consider it if you are forced to used some particular MCU with just 1 CAN controller.

If using a modern CPU is an option, you could perhaps consider the LPC11C22 Cortex M0 with a built-in high speed CAN tranceiver. If you had that MCU you could enable the high-speed CAN when needed, or keep it disabled and use the external fault-tolerant one instead. Minimal BOM.

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What you are asking for makes no sense.

Since both transceivers are connected to the same CANH and CANL, they are connected to the same CAN bus. CANH and CANL is the CAN bus. On the other side, you show both transceivers being connected to the same CAN control lines of the same PIC. That's not going to work since the CAN TX and RX lines are not meant to be shared between multiple transceivers.

The only difference you show between the two transceivers in your diagram is that one is "high speed" and the other "low speed". This again makes no sense. You can run a CAN bus as slow as you want, as long as all your devices know the speed. In any case, the transceiver doesn't dictate the speed. That is up to whatever is driving CANTX and receiving CANRX. The CAN transceivers are merely electrical interface chips that know nothing about the individual CAN bits or time quanta.

I don't know of a CAN transceiver that isn't capable of the maximum 1 Mbit/s that CAN is specified for. Therefore I don't know what "low speed" and "high speed" are supposed to mean as applied to a CAN transceiver. Even if you are doing something special, a "high speed" CAN transceiver should still be able to drive the CAN bus at any arbitrary lower speed than its maximum rating.

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  • \$\begingroup\$ From what I understand, "low-speed" actually implies a "low-fault/tolerance" feature that High Speed CAN does not have. This low tolerance feature was desired in the design. The board is meant to interface to several systems, some need the low speed and low fault option, while others need the high speed option. You mentioned that CAN TX and RX lines are not meant to be shared on the PIC, could you elaborate? Thanks Olin for your insight so far. \$\endgroup\$ Commented Mar 27, 2014 at 2:13
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    \$\begingroup\$ I believe the OP is referring to the two different kinds of physical layer that a CAN bus can have. The most common one is defined by ISO 11898-2 and called "high speed CAN", since it can handle up to 1 Mbps. If you just say "CAN", you typically refer to high speed CAN. There is also the oddity called "low speed CAN" or "fault-tolerant CAN" defined in ISO 11898-3, which can only handle up to 125kbps but is more "rugged". It uses a different bus termination than high speed CAN and also has mandatory 5V supply, so the two kinds can't co-exist on the same bus. \$\endgroup\$
    – Lundin
    Commented Mar 27, 2014 at 11:54
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    \$\begingroup\$ More info here. There are indeed special transceivers for low speed CAN and they cannot handle 1 Mbps. \$\endgroup\$
    – Lundin
    Commented Mar 27, 2014 at 11:55
  • \$\begingroup\$ @Lundin: If that is what the OP meant, he should have said so. That was certainly not clear. All he said was "CAN", so I took that to mean the normal differential bus floating at about 2.5 V, 120 Ohms termination at each end, 900 mV offset on each line for dominant. Many chips support this, like the common MCP2551. My answer was within this context. \$\endgroup\$ Commented Mar 27, 2014 at 12:24
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    \$\begingroup\$ The OP is using the correct terms. The "CAN" standard you refer to (used by MCP2551 et al) is formally named "ISO 11898-2 Road vehicles - Controller area network (CAN) - Part 2: High-speed medium access unit" and it's bastard brother is called "ISO 11898-3 Road vehicles - Controller area network (CAN) - Part 3: Low-speed, fault-tolerant, medium-dependent interface". \$\endgroup\$
    – Lundin
    Commented Mar 27, 2014 at 12:35

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