Start with the basic voltage divider, set for minimum threshold.
simulate this circuit – Schematic created using CircuitLab
We can use a zener diode to clamp the voltage, or a diode into a 3-5V supply (assuming it can handle some current being sourced into it). C1 represents the diode's capacitance, typical for a 1N5231 say. This gives a response like so:
at a 200V step input.
Since the R1-R2 divider is a free variable, we can reduce the value proportionally to improve risetime. We can also cancel C1's pole with a zero at R1:
simulate this circuit
The ESR might not be necessary IRL, but it improves the simulation result here (particularly because the step source is ideal; CircuitLab doesn't have a PULSE source for some godforsaken reason). (And yes I know I can use a PWL source, and I don't care to.)
This gives a response:
Indeed larger resistor values can be used now, give or take how much you require a static reading versus changes/edges being acceptable. That is, if it's only ever stepping between 0V and whatever Vhigh is, and the rate is as fast as quoted, you probably don't care.
If you do need a precise threshold (say it steps between multiple voltage levels, not just 0 and high), it will be better to use a compensated probe type arrangement, with linear response (no diode), and a comparator to "slice" the threshold:
simulate this circuit
with response such as,
mind, there's no comparator models in CircuitLab either so this is just random parameters entered into the generic op-amp model. But expect something like that.
You may want a high-speed buffer on the SNS node as well, to be able to probe it -- you can't probe it with just anything, without also disturbing the measurement; a 10x probe has a chance of working at the modest (1k) impedance here, but preferably it should be buffered to guarantee a correct measurement. Alternately, the 1k could be split into 950 + 50, and the 50 could be provided by a terminated coax connector, so that it can be measured with a (terminated) 50Ω scope for calibration.
Calibration is a big deal here, since such small values as C2 cannot be made consistently and must be adjusted, perhaps merely by bending a stiff wire in proximity to the traces in question. Alternately, C1 can be a trimmer (in part or whole), to the same end.
Note that the resistor must be several parts in series, or a high voltage type, to handle such voltages. It should further be a thin-film type, suitable for pulse measurements such as this -- in normal bulky types or series connections, stray capacitance from the middle of the resistor to the surroundings causes "hook" (there's an old Tek paper that discusses this in detail which unfortunately is impossible to search for and I don't recall the exact name of, if someone knows what I'm thinking of please add it here) in the step response, i.e. instead of a flat top, it wobbles around a bit, and at such time constants that C2 alone cannot compensate against. Such errors will cause indeterminate readings at your lowest voltage settings.
As for this,
When the pulsed DC signal output is less than 0 volt, the corresponding TTL signal will be 0 V. And, when the pulsed DC is greater than 100 V, the TTL signal will be 5 V.
I note that you left the 0-100V range undefined. I shall assume this in the HDL sense, i.e. an "inferred latch": the output level persists until set by the above definition. In that case, simply add another comparator set to zero threshold, and an R-S flip-flop between their outputs.
If this range of ambiguity is meant more simply as a range in which the threshold can fall, or where a comparison / decision is not required, then the single comparator or zener-clamped case will suffice.
