I am determining the reverse leakage of a Schottky diode in a circuit:
simulate this circuit – Schematic created using CircuitLab
The intention here is to bias the P-FET gate so that it conducts when the switch is open (technically when V1 is absent). When the switch closes, it should stop conducting and isolate the battery. (There is a body diode in the P-FET not shown by the schematic.) The purpose of the Schottky diode is to prevent current flow from the battery to ground through the gate bias resistor. However some leakage will of course be unavoidable.
The datasheet for a diode under consideration indicates that approximately 15µA of leakage should be expected for 3V reverse bias.
My question is how will this leakage be affected by the bias resistor? With the switch open, the potential at D1 anode should be 0V, but would the resistor not also further reduce this current? How do I calculate that?
This related question was not very helpful because I am unsure if the OP's formulas are remotely applicable or correct.
Edit:
This device is battery powered with a non-rechargeable battery. V1 represents an optional 3V source which, if used, should not be connected to the battery. The purpose of the circuit is to allow the device to be powered with the battery under normal circumstances, but if V1 is connected, it powers the device instead and the battery is disconnected.
The diode is meant to prevent the battery voltage from affecting the gate, while the FET (and its body diode) is meant to disconnect the battery when V1 is present.
Judging from comments and answers, this intention was not clear. With that explained, I am also sensing that there are bigger issues with this design, on which I would appreciate any constructive criticism.