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I am using this DC-DC buck converter - buck converter.

Schematics :

enter image description here

Buck Converter Specifications :

  • Input Voltage - 18V to 32V
  • Switching Frequency - 300kHz
  • Output Voltage 9V
  • Load Current - 0mA to 200mA Maximum.

I have 2 questions:

  1. What does it mean when a design recommendation states - "The output capacitor ESR and capacitance form a zero = 1 / (2 x π x Cout x ESR). This zero can move significantly if an aluminum output capacitor is used. Aluminum output caps ESR can change 10x over temperature."

Can someone explain me a little intuitive on what this recommendation states and why should I take care when designing a buck converter? How to test it or verify this recommendation?

  1. Why should we care about the output aluminium electrolytic capacitor's frequency vs impedance graph while selecting the output capacitor of the buck converter (in this case the 47uF?)

Can someone explain to me a little intuitively the answers for the above 2 questions?

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  • \$\begingroup\$ From where that quote is? It's not in the datasheet? Please link to source. \$\endgroup\$
    – Justme
    Commented Nov 5, 2020 at 9:26
  • \$\begingroup\$ Shouln't you ask from colleagues instead of quoting company documents online? \$\endgroup\$
    – Justme
    Commented Nov 5, 2020 at 9:34
  • \$\begingroup\$ They are totally about maintaining the stability of the converter. I think that a little technical background in Control Theory is required to fully understand what the recommendation states. You can start by studying the first 5 or 6 sections of this document. \$\endgroup\$
    – Rohat Kılıç
    Commented Nov 5, 2020 at 9:35
  • \$\begingroup\$ Yes, thank you. But how does the stability of the converter depend on the frequency vs impedance graph of the output capacitor? \$\endgroup\$
    – user220456
    Commented Nov 5, 2020 at 9:38
  • \$\begingroup\$ C101 and C102 are the important capacitors in your circuit and they are not electrolytic. \$\endgroup\$
    – Andy aka
    Commented Nov 5, 2020 at 9:55

3 Answers 3

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The recommendation given in the application note is not new and the phenomenon well known. A capacitor is made of several parasitics among which you find the equivalent series resistance (ESR):

enter image description here

This ESR can be revealed by an impedance graph or be extracted from the capacitor data-sheet. For an electrolytic capacitor, the ESR varies significantly with age, temperature, frequency while the capacitance is sometimes affected by the bias depending on the adopted technology. At low temperature the ESR is large while it diminishes at a higher temperature.

When you run a small-signal analysis of the buck converter operated in current-mode control, you end-up with the equivalent circuit:

enter image description here

You can see the output capacitor decoupling the load \$R\$ and it appears with its parasitic term, \$r_C\$. This combination creates a zero in the transfer function. If you go through the equations and determine the control-to-output transfer function of this converter, you should find:

\$H(s)=H_0\frac{1+\frac{s}{\omega_z}}{D(s)}\$

In this expression, the numerator hosts the zero defined as \$\omega_z=\frac{1}{r_CC}\$. This zero is going to change the phase response of the power stage you want to stabilize. Since \$r_C\$ is going to change with temperature and age, it is your duty as a design engineer to make sure the compensation strategy is adequately calibrated to ensure proper operation despite these variations. Monte Carlo, multiple ac simulations or worst-case analyses can tell you how robust your system is in the end.

This zero contribution is also present in linear regulators and you have to carefully select the capacitor to keep away from the so-called tunnel of death where stability can be at stake with certain ESR values. Fortunately, in your circuit, the controller lets you tailor the compensation strategy to account for the ESR variations and other contributors.

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  1. As I stated in the comments, a little background of Control Theory is required to fully understand. This document from On Semi could be a good start.

  2. That's because of the self-resonance of the capacitor. An ideal capacitor has only a capacitive part, but a real capacitor is nothing different from an RLC circuit. Looking at the Z-f graph of a capacitor, you'll see that the Z hits its minimum at a frequency. This frequency (the self-resonance frequency) is determined by ESR (and also ESL -- effective series inductance), and it can be thought of as the maximum frequency that the capacitor can be used at. Above this frequency, the capacitor's ESL (i.e. inductive effect) becomes more effective and this surely affects the stability of the converter.

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  1. The capacitance and ESR forms an RC lowpass filter. If the ESR changes by tenfold, then the cutoff frequency of RC will too, so it changes the filtering frequency.

Which leads us to 2)

It requires that the regulator, or the external compensation circuitry it has, is designed to allow for this variation in the ESR and the variation in the lowpass frequency or the regulator goes outside stable operation.

So that is why the impedance of capacitor is important.

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