0
\$\begingroup\$

NIM is a standard used in nuclear physics. I'm facing an issue with a logic gate being used in my TTL to NIM translation circuit, and I'm not sure what is entirely wrong with it. For a little background, I'm trying to replicate a TTL to NIM logic translation circuit as demonstrated in a reference schematic linked below, but I'm having some issues regarding a specific part of the circuit, specifically the logic gate.

Here's a link to my reference schematic, but if you prefer, I'll draw out my circuit below.

schematic

simulate this circuit – Schematic created using CircuitLab

It's a little modified from the original circuit with the addition of a pull-down resistor at my TTL logic input at the gate as well as using 5 pF capacitors instead of 3.3p, but otherwise, the rest are the same.

The original schematic used an XOR gate, and it seems to be the F86 XOR gate. I used the 74LS386 quad dual-input XOR gate to substitute for it, but it doesn't seem to be working properly. Setting one input to ground, I used a switch to set the other input to 3.3 V for the TTL high input (and when the switch is open, a pull-down resistor for that input pulls it down to 0 volts for logic 0). The output of the gate goes to the rest of the circuit, which should produce a NIM-logic current signal (0 mA for logic 0, -15 mA for logic 1). However, somehow, my XOR gate output doesn't change at all, and the NIM-logic stays constant at -15 mA whether or not my input switch is closed (while the output of the logic gate is between -0.5 and -0.6 V). This behavior also occurs when a gate input is set to VCC (+5V).

Seeing as how this is not behaving correctly, I swapped out the IC with the DM7404N hex inverter IC. Logically, it should behave as if one of the XOR inputs is set to VCC, logic high. Swapping it out and putting a pull-down resistor at the input, the circuit behaves exactly as I hoped it would. The output of the inverter goes from 0.7 V to 3.4V depending on the input, and the NIM current correctly goes from -15 mA to 0. Seeing as how the circuit works with the inverter and not with the XOR gate, I was wondering what could be the reason why? I thought that perhaps the inverter circuit is more simple and allows for larger output current than the XOR gate, but I wonder if that is truly the case?

To be fair, there have been instances where using the XOR gate gives the correct intended result, but this doesn't seem to be consistent anymore. Whereas with the inverter replacing the XOR gate, it seems to work all the time.

EDIT: After reading the comments, I thought to try to use a different XOR gate of a different technology type, specifically the MC14507, the CD4030AY, and the SCC4070BE. I did some research and found that these gates are based on MOS technology which should allow for more current flow, and that seems to be the case. The NIM logic signal switches consistently, so is it safe to assume that all my problems are just using the LS XOR gate?

\$\endgroup\$
10
  • \$\begingroup\$ Could it be the poor drive current levels of the LS family? \$\endgroup\$
    – Andy aka
    Commented Sep 10, 2019 at 13:17
  • 1
    \$\begingroup\$ @user101402 you are reading the data sheets incorrectly. When driving a high logic level, the LS family can only muster 0.4 mA whereas other logic families can provide much more umph. \$\endgroup\$
    – Andy aka
    Commented Sep 10, 2019 at 13:37
  • 2
    \$\begingroup\$ But you're using the high-level output to source current to Q1. 11V / 4.2k = 2.62 mA, plus whatever current Q1's base requires. You could try increasing the values of R2 and R3 by an order of magnitude, to 20k and 22k, respectively. \$\endgroup\$
    – Dave Tweed
    Commented Sep 10, 2019 at 13:49
  • 1
    \$\begingroup\$ The drive capability (high output) for the 74LS386 is 0.4mA max (for the old Mot-SPS part). The 74F86 is 1mA max; a lot of difference. Try pulling more out of the LS part and the output voltage will simply drop due to the effective output resistance in the high state. Datasheets: docs.isy.liu.se/pub/VanHeden/DataSheets/sn74ls386.pdf and scientific-solutions.com/surplus/parts/938511/74f86.pdf \$\endgroup\$ Commented Sep 10, 2019 at 14:41
  • 1
    \$\begingroup\$ @user101402 - it is quite possible that the initial apparent overload has fried the part. \$\endgroup\$ Commented Sep 10, 2019 at 14:50

1 Answer 1

2
\$\begingroup\$

I'm not sure how that worked even with the original 'F86 gate — it has a specified maximum IOH of -1 mA.

In any case, I would recommend ditching the gate altogether and using another differential amplifier for input.

schematic

simulate this circuit – Schematic created using CircuitLab

Q2, R3 and R4 establish the switching threshold for the TTL input. The rest of the circuit is the same as your reference.

If you still want switchable polarity, connect the 'x86 gate to the TTL in shown here.

\$\endgroup\$
2
  • \$\begingroup\$ Thank you for your reply. If you don't mind me saying, I found some CMOS-based XOR gates, and replacing the 74LS386 with them seems to make the original circuit switch properly now. I thought that using CMOS-based gates would allow for more current drive in this case. Regarding your circuit that you posted, why do you recommend the use of a diff. amp. here with the additional transistors? It seems that you would need to add more voltage biases (with the +- 2V), so what kind of advantages would this offer? \$\endgroup\$ Commented Sep 11, 2019 at 16:10
  • \$\begingroup\$ It's conservative design, since I don't know how accurately you need to adhere to the TTL interface specification. Also, keeping all of the transistors out of saturation (although this design doesn't completely succeed at that) keeps the switching speeds as fast as possible. Again, I couldn't know how much you depend on that. If you're happy with a CMOS gate, then obviously, neither of these things was important to you. \$\endgroup\$
    – Dave Tweed
    Commented Sep 11, 2019 at 16:39

Not the answer you're looking for? Browse other questions tagged or ask your own question.