Effective transconductance of a CMOS inverter

Question

If we have a CMOS inverter operating in its' linear region, what would be the effective trans conductance of the inverter?

Answer 1

Speaking about "transconductance" you are referring to a circuit in which a CMOS inverter is used as a linear amplifier. This is possible if we fix a suitable dc operating point in the middle part of the transfer characteristic Vout=f(Vin). This can be simply done with a feedback resistor RF between output and input. This feedback resistor RF acts as a load - together with an additional load resistor RL (if existent).

Hence, the effective load resistance is Reff=RF||RL. In addition, the finite (dynamic) CMOS output resistance r,o is to be considered.

If there is no signal feedback the input voltage is connected through a coupling capacitor to the common gate terminal and the avalable gain is

A=gm*(Reff||r,o)

From this we can derive that the effective transconductance is

gm=A/(Reff||r,o).

In case the input voltage has an internal source resistor Rin, we have negative signal feedback and the voltage gain is reduced correspondingly.

Answer 2

I can't remember reading this in a book, but I can try to derive it. (Here considering an open-loop inverter without anything else loading it)

Transconductance (\$g_m\$) is defined as:

$$ g_m = \frac{\partial I_{out}}{\partial V_{in}} $$

The transconductance of an NMOS is known as:

$$ g_{mn} = \frac{\partial I_{ds}}{\partial V_{gs}} $$

According to this and this, the transconductance of a PMOS is given as:

$$ g_{mp} = \frac{\partial I_{sd}}{\partial V_{sg}} $$

If we define \$I_{out}\$ for an inverter, to some load as:

$$ I_{out} = I_{p} - I_{n} = I_{sd,p} - I_{ds,n} $$

Differentiating \$I_{out}\$ should then give \$g_m\$ of an inverter:

$$ g_m = \frac{\partial I_{sd,p}}{\partial V_{in}} - \frac{\partial I_{ds,n}}{\partial V_{in}} = - g_{mp} - g_{mn} $$

Note that \$ V_{gs,n}=V_{in}\$ and that \$V_{sg,p}=V_{DD}-V_{in}\$.

The load should be \$r_{dsn}\|r_{dsp}\$, thus an open loop inverter should have a small signal voltage gain of:

$$ A_V = -(g_{mn} + g_{mp})(r_{dsn}\|r_{dsp}) $$

For the quantities I think it should be noted that:

• \$|g_{mn}|\$ increases when the input voltage increases
• \$|g_{mp}|\$ decreases when the input voltage increases
• It may be difficult to get the devices in saturation so \$r_{dsn}\$ and \$r_{dsp}\$ might be quite low

There are lots of papers on "floating gates" and inverters. Inverters are actually really nice & very high GBW amplifiers. If you take control of each transistor individually you can also get a sensible current level, while cascodes can probably be added to help voltage gain.

If anyone sees a mistake, please correct me.

Edits: I added a definition of \$I_{out}\$ and \$g_{mn}\$, \$g_{mp}\$. This swapped some signs around for the resulting \$g_m\$.