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In the top left corner of this snapshot, you can see a bonafide test point, TP12. Slightly down and to the right of TP12 you can see an exposed copper pad, also likely a test point.

What I am confused about are the numerous plated through-holes in this board (I am holding the board up to the light). They aren't connected to anything usually. Are these likely to be used as test points, or engineered in "just in case" for future connections and test purposes?

Is this typically good practice? Generally I can see these holes go straight through the 4-layer board, and are plated top side and bottom side. What could be the purpose of these, and is it a good practice to include them on a prototype circuit? Also, I am guessing that the plated holes do not interact with ground and power planes.

enter image description here

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Hard to tell from your picture but that pad looks like a fiducial used to help assembly line things up. A via with no obvious outside traces connected could be a stitching via between planes or between gnd and say outer layer copper flood connected to gnd. It could also be a via for inner layer traces if say they ran one on the power layer.

That said if it's plated flat and filled, and you can see that it is on both sides then it very likely is a test point

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  • \$\begingroup\$ I think your first guess is right. The copper pad near tp12 looks like a feducial to me. Especially if it's near the corner and other test points are on the silkscreen. Used by computer vision in pick and place machines to work out where the board is and correlate it with the gerber data \$\endgroup\$
    – Will
    Commented Dec 28, 2014 at 18:39
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Those are vias. They are used to link traces on different layers of a multilayer PCB. Note that vias that go through only part of the board, called "blind vias", are more expensive to manufacture and so usually are only used when either space or spec wiggle room is at a premium.

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    \$\begingroup\$ The ones that don't seem to go anywhere go to inner layers, usually power and ground as these are the biggest net. The silk screen has a ti logo on it so I assume it's a ti development kit. The layout is probably shown for all the layers in the user manual for the kit \$\endgroup\$
    – Will
    Commented Dec 28, 2014 at 18:42

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