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My simple understanding is as follows.

Memory (RAM) is composed of bits, groups of 8 which form bytes, each of which can be addressed ,and hence byte addressable memory.

Address Bus stores the location of a byte of memory.

If an address bus is of size 32 bits, that means it can hold upto 232 numbers and it hence can refer upto 232 bytes of memory = 4GB of memory and any memory greater than that is useless.

Data bus is used to send the value to be written to/read off the memory. If I have a data bus of size 32 bits, it means a maximum of 4 bytes can be written to/read off the memory at a time. I find no relation between this size and the maximum memory size possible.

But I read here that:

Even though most systems are byte-addressable, it makes sense for the processor to move as much data around as possible. This is done by the data bus, and the size of the data bus is where the names 8-bit system, 16-bit system, 32-bit system, 64-bit system, etc.. come from. When the data bus is 8 bits wide, it can transfer 8 bits in a single memory operation. When the data bus is 32 bits wide (as is most common at the time of writing), at most, 32 bits can be moved in a single memory operation.

This says that the size of the data bus is what gives an OS the name, 8bit, 16bit and so on. What is wrong with my understanding?

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  • "What is wrong with my understanding?" - You are trying to make one definition fit different things. The bit-size descriptor has been used at different times for different things.
    – sawdust
    Commented Jul 8, 2012 at 22:59
  • 1
    It means whatever the manufacturer says it means. Generally that will be something resembling register size, but there are many ways to fake/swizzle that. Commented Jul 8, 2012 at 23:31

4 Answers 4

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In a simple design, the size of the data bus is the size of the processor registers. This is generally true for the first generation of most designs, so the first 16-bit CPUs had 16-bit buses, 32-bit CPUs had 32-bit data buses, etc.

However, It is the size of the processor's integer registers that determine the OS type (64 vs 32) and not the data bus. The data bus can differ from the integer registers, but author of your quote associates the two together because it was often historically the same.

Some real world examples where the data bus and integer register widths differ:

  • The original 8088 of the IBM PC is a 16-bit CPU design, but the data bus is 8-bits wide. To move 16-bits into a processor register from RAM required two access cycles

  • The Original Pentium from 1992 has a 64-bit data bus but is a 32-bit design. The larger data bus allows the CPU to transfer more data in and out with caches but still only access 32-bits at a time internally with its CPU registers.

Generally the pointer size also follows the register size but the physical address bus width can be bigger or smaller than the register size. Some examples:

  • Most 8-bit CPUs could address at least 64k of memory with a 16-bit address bus.
  • The 8086 was 16-bit but had a 20-bit address bus to allow more addressable RAM.
  • The original AMD Opteron is 64-bit but the physical address bus is 40-bits (internally) to simplify the design of the memory subsystem, since the a full 64-bits is too large to be utilized. Modern 64-bit AMD CPUs are 48-bits.

Modern designs also use much more complicated buses that don't cleanly fit into a bit-width paradigm. The Opteron example above is about how much the CPU can physically address according to software, there actually may or may not be any physical 48-bit addressing exposed by the CPU. CPUs are highly integrated and have specialized buses for peripherals, memory, and communication with other CPUs. There is no longer longer a singular "data bus" or "address bus". These buses may use differential signalling that doesn't deal with bit widths in any meaningful way, and even when they do, they are not strongly coupled to the CPU's architectural registers.

It's best to recognize that the bitness of a CPU is entirely architectural and mostly just from a software perspective. It doesn't have much to do with physical design anymore.

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  • 2
    "the physical address bus width can be bigger" - Especially with 4-bit and 8-bit processors!
    – sawdust
    Commented Jul 8, 2012 at 23:10
  • Okay. But I'm trying to understand it trivially. I could find no relation between size of the databus and maximum possible memory ,like I could explain with address bus size. So the answer seems to be "NOT ADDRESS BUS SIZE but DATA BUS SIZE"(because it is usually as big as the processor registers). Am I missing something?
    – learner
    Commented Jul 10, 2012 at 19:22
  • @learner That's correct, the confusion also lies in the fact that the maximum pointer size of a system is the size of the processor registers. In a flat address space as with most modern systems that equates to being limited by the size of the processor registers, hence the addressing limitations as you pointed out. Some processors, especially older ones, utilized tricks such as special segmented addressing to get around this.
    – Dougvj
    Commented Jul 10, 2012 at 19:40
  • @Dougvj , Okay , it is getting clearer. But why did they make address bus sizes different from processor register sizes? Would it not make more sense to keep them the same? And I'm confused about where the addresses are kept? (the address bus or the processor register?) Thank you
    – learner
    Commented Jul 11, 2012 at 19:22
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    @learner That's correct. To summarize: The OS designation corresponds exactly with the size of the processor registers. The address bus may or may not be the same size as the processor registers, thus the maximum possible addressable RAM is independent from that. The processor internally, however, almost invariably has some kind of addressing scheme involving pointers that are the same size as the processor registers.
    – Dougvj
    Commented Jul 16, 2012 at 16:22
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There's no "pure" 32 or 64 bit system, and therefore the terms are just approximations anyway.

E.g. take your statement "Memory (RAM) is composed of bits, groups of 8 which form bytes, each of which can be addressed". That's not very common. PC's have their RAM on DIMM modules, and those are 64 bits wide. Back in the 90s, you had SIMMs, and those were 32 bits wide.

In some system DIMMs must or can be paired ("ganged"/"dual channel"), which would be a 128 bits databus. This concept predates the so-called "64 bits" processors from AMD and Intel.

Those groups of 64 bits from a single DIMM can indeed be subdivided in 8 bytes. That's doen pretty transparently by your CPU. It can also break the 64 bits in 4*16 bits, 2*32 bits, or just use all 64 bits as a single variable.

The most important question however is the width of an address. Every byte in memory has its own address, but not every bit. That means the 64 bits you get from a single DIMM have 8 addresses. The lowest of these is always a multiple of 8: Now, how many distinct addresses does the CPU support? There are two common answers, at least in theory. Some CPU's support 232 different addresses, some support 264. This distinction is the most common distinction between 32 and 64 bit systems.

In practice, 64 bit systems today support less than 264 bytes of RAM. That would be unaffordable, and wouldn't fit in a normal PC anyway. That much memory would weight several million tons !

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  • Is it the processor register where an address is kept ,or is it the address bus? You say "some CPUs support 2^32 different addresses..." . What are they exactly limited by?
    – learner
    Commented Jul 10, 2012 at 19:29
  • Typically, both the register sizes and the MMU (Memory Management Unit, the part of the CPU which is directly responsible for the memory).
    – MSalters
    Commented Jul 11, 2012 at 11:57
  • You have a contradiction regarding byte-addressable memory. First you write that it's "not very common". But later "Every byte in memory has its own address". Regardless you also seem to conflate the unit of addressability with the memory data width in the first two paragraphs. Your mentioning of SIMM and DIMM is confusing and irrelevant to the question.
    – sawdust
    Commented Dec 24, 2020 at 5:57
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It's the register size and memory handling within the processor.

Using tricks, one 16 bit processor had a 20 bit address bus, so it's not memory external of the processor.

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Both actually.

The bits on a CPU is normally a reference to the size of its internal registers. A 32 Bits CPU has 32 Bits registers wich may or may not be divided into chunks.

It make sense to have a 32 Bit CPU with a 32 bit data bus because you can transfer all data from memory directly to the registers, but you can have any data bus size. So 32 Bit CPU normally have 32 Bit data bus to make it easy to transfer data from and to it.

And also make sense to have a 32 Bit Address bus for two reasons. A bigger address bus would make harder to do indirect addressing because you would not have a register bigger enought to store a memory address or the CPU would need specialized register for memory addressing, note that old CPUs like the Intel 8080 were 8 bit and had a 16 bit address bus. The opposite, a address bus smaller than the register is just a waste of resources. There are microcontrollers that use smaller address bus.

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