For a modern single-cpu system things are transparent: there is multicore cpu, where cores are talking via uncore functions (like L3 cache, shared on-die memory controller). Uncore does also all the handling pci-e bus functions, providing access to GPU, network card or ssd for instance. I can read that a particular processor does support 40 pci-e lanes, for example.
But things go weird when I am trying to think of how does two separate processors could talk to a single gpu? How that is usually solved on multi-socket chipsets (Intel® C612 for example)? Can i use 80 pci-e lanes from both processors, to connect 80 gpus, so that every core from any of both chips can talk to every gpu?
