In this paper, the authors adopt #vector-#wise and #element-#wise compression on the raw or pre-processed received signal vectors to store them in the memory. They investigate the impact of the limited memory capacity in the #access #points (#APs) on the optimal number of APs. They show that with no memory constraint, having single-antenna APs is optimal, especially as the number of users grows. However, a limited memory at the APs restricts the depth of the sequential processing pipeline. Furthermore, they investigate the relation between the memory capacity at the APs and the rate of the fronthaul link. ---- Vida Ranjbar, Robbert Beerten, Marc Moonen, Sofie Pollin More details can be found at this link: https://lnkd.in/ep2cd_XW
Shannon Wireless’ Post
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This can prove to be a game changer
Scientists from ETH (Thomas Hofmann, Bobby He ) found a radical simplification of the transformer architecture without loss of accuracy and significant improvement of training and inference speeds https://lnkd.in/gW9--GjY
Simplifying Transformer Blocks
arxiv.org
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⚡Msc Electrical Engineering |📡Electronic Design | 🧠 Machine Learning | 🌐 React Frontend Developer |⚙️ FPGA | 🐍 Python
The article raises a pertinent question about simplifying transformer blocks. The idea of removing components without affecting training speed is intriguing, though it may carry risks of losing functionality or accuracy in some scenarios. This research strikes a balance between innovation and efficiency, a promising step towards more agile AI models. #AI #transformers #artificialinteligence #deeplearning
Scientists from ETH (Thomas Hofmann, Bobby He ) found a radical simplification of the transformer architecture without loss of accuracy and significant improvement of training and inference speeds https://lnkd.in/gW9--GjY
Simplifying Transformer Blocks
arxiv.org
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Check our recent work on how to accurately predict resonator's frequencies in a 3D circuit-QED architecture. Kudos to Hang-Xi Li and others!
Experimentally Verified, Fast Analytic, and Numerical Design of Superconducting Resonators in Flip-Chip Architectures
ieeexplore.ieee.org
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Our work, "Skew-CIM: Process-Variation-Resilient and Energy-Efficient Computation-in-Memory Design Technique With Skewed Weights," was recently published as an Early Access article in the IEEE Transactions on Circuits and Systems I: Regular Papers (TCAS-I). This research introduces a novel software-hardware co-design technique, Skew-CIM, aimed at enhancing the resilience and energy efficiency of analog-mixed-signal compute-in-memory (AMS-CIM) systems. Leveraging the two’s-complement format, we tackle the inherent challenges of DNN accuracy drops and high computation currents in AMS-CIM systems. Our key discoveries include: - A weight skewing (WESK) approach that optimizes the balance between ‘0’ and ‘1’ at the software level, effectively addressing the accuracy and energy consumption challenges. - Our technique showcases a 7.6 times reduction in DNN classification error and a remarkable 39.9% improvement in energy efficiency, surpassing conventional systems. This research not only advances our understanding of AMS-CIM systems but also paves the way for future innovations in energy-efficient computing architectures. I am eager to hear your thoughts and engage in discussions about how these findings might influence future research directions or applications. Your perspectives are invaluable as we navigate these exciting possibilities together. 🔍 Read the Full Paper Here: https://lnkd.in/gsBemfYW #ComputerArchitecture #Microprocessors #EnergyEfficiency #InMemoryComputing #AnalogComputation #ArtificialNeuralNetworks #IEEE #Innovation #Research
Skew-CIM: Process-Variation-Resilient and Energy-Efficient Computation-in-Memory Design Technique With Skewed Weights
ieeexplore.ieee.org
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𝗧𝗵𝗲 𝘀𝗲𝗺𝗶𝗻𝗮𝗹 𝗽𝗮𝗽𝗲𝗿 𝘁𝗵𝗮𝘁 𝗹𝗲𝗱 𝘁𝗼 𝗖𝗵𝗮𝘁𝗚𝗣𝗧. Introduced self-attention mechanism for dynamic relevance weighting. Proposed Transformer architecture without recurrent or convolutional layers. Added positional encodings to retain input sequence order. Enabled parallelization for efficient training and inference. Achieved state-of-the-art performance on benchmark tasks.
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I'm thrilled to announce that our paper, titled "Hybrid Precoding/Combining for mmWave MIMO Systems With Hybrid Array Architecture" has been accepted and published in the prestigious IEEE Access journal. You can read it here: https://lnkd.in/eezUft8J A heartfelt thanks to my co-authors, Prof. Claude D'Amours, Prof. Francois Chan, and Dr. Faisal Al-Kamali, for their invaluable guidance and support throughout this research. #FullArrayArchitecture #HybridArchitecture #SubarrayArchitecture #HybridPrecodingAndCombining #mmWaveMassiveMIMO"
Hybrid Precoding/Combining for mmWave MIMO Systems With Hybrid Array Architecture
ieeexplore.ieee.org
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Thanks to everyone who attended Momento's lunch-and-learn stream yesterday! Here's the video for part 2 of my talk on cellular architecture: https://lnkd.in/eBjmMp56
Metabolizing Cellular Architectures: Part 2
https://www.youtube.com/
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Explore the paper titled "Ultralow-Voltage Retention SRAM With a Power Gating Cell Architecture Using Header and Footer Power-Switches" published in the IEEE Open Journal of Circuits and Systems (OJCAS), (Volume 2, 2021). A new ultralow-voltage retention SRAM (ULVR-SRAM) cell with header and footer power switches (HFPSs) is proposed to achieve significant leakage power reduction during power gating applications. Access the full paper by visiting IEEE Xplore, here: https://loom.ly/ThIgzzY #IEEEOpenJournal #ResearchPaper #Technews
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This context proposes a deep unfolding architecture namely the #Primary #User-#Detection #Network (#PU-#DetNet) that harvests the strength of both: analytical and data-driven approaches. In particular, a technique is described that reduces computation in terms of inference time and the number of #floating #point #operations (#FLOPs). It involves binding the loss function such that each layer of the proposed architecture possesses its own loss function whose aggregate is optimized during training. ----Dhaval K Patel, Miguel López-Benítez, Siddhartan Govindasamy More details can be found at this link: https://lnkd.in/dCb_Kwks
PU-DetNet: Deep Unfolding Aided Smart Sensing Framework for Cognitive Radio
ieeexplore.ieee.org
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Assistant Engineer @ SAMSUNG ELECTRONICS AMERICA | MS in Telecommunications Engineering @ UMD
Some efforts sometimes result in no gain. Well this one did! Please find one of the my research papers on LOW-COST MOBILE TRANSCEIVER ARCHITECTURE FOR THE COEXISTENCE OF 4G-LTE AND 5G NR SYSTEMS. In this paper, an overview of critical developments in the field of mobile communication technology, drawing insights from three seminal research studies to achieving a mobile transceiver architecture for the coexistence of 4G-LTE and 5G NR systems. The paper initially discusses few of the current mobile communication standards, how circuit non-idealities significantly influence performance and how tailored circuit techniques reduce the non-idealities. The paper further on discusses the interference cancellation techniques, architecture and the circuit implementation of the design.
