From the course: Learning FPGA Development

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Demo system for the Intel platform

Demo system for the Intel platform - FPGA Tutorial

From the course: Learning FPGA Development

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Demo system for the Intel platform

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- [Narrator] If you look at the system we want to implement, you'll notice that we want to have enough buttons to operate the A and B inputs and we want all of the four digits to show on the displays at all times. Luckily for us, this is possible in the Intel Board because it has 10 digital input switches and six independent seven segment displays. That means that 42 pins of the FPGA are connected to the display array. This doesn't look very efficient in terms of pin usage, but that's the way this board was designed. We will take advantage of this by making a combinational system, because we don't really need that clock signal. If you take a look at the DEO-CV board manual, you'll see that each digit has it's seven anodes connected to an array named HEX zero through five and it's individual bits represent each segment in the order shown. The following table shows all 42 pin assignments for these six digits in the display. That's a lot of pins.

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