Timeline for AMD 24 core server memory bandwidth
Current License: CC BY-SA 3.0
12 events
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Sep 27, 2012 at 13:31 | vote | accept | ntherning | ||
Sep 27, 2012 at 11:38 | history | edited | ntherning | CC BY-SA 3.0 |
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Sep 26, 2012 at 21:43 | history | edited | ntherning | CC BY-SA 3.0 |
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Sep 25, 2012 at 21:37 | answer | added | chx | timeline score: 9 | |
Sep 25, 2012 at 20:33 | comment | added | Chris S |
The wrong organization can cause havoc, but yours is correct. I'm really not sure what's going on here, but I know current Opterons beat current Intel processors in various memory benchmarks on account of the Opterons having 4 channels, and Intel only having 3. There might be something going on with the single threaded nature of the mbw software; though dd is showing similar results... Not sure, but not right.
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Sep 25, 2012 at 20:03 | comment | added | ntherning | @ChrisS: I've updated the question with more info on the memory modules and the current layout. | |
Sep 25, 2012 at 20:01 | history | edited | ntherning | CC BY-SA 3.0 |
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Sep 25, 2012 at 17:27 | comment | added | Chris S | What's the layout of the memory? Is it registered? | |
Sep 25, 2012 at 15:59 | history | edited | ntherning | CC BY-SA 3.0 |
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Sep 25, 2012 at 15:51 | comment | added | ntherning | The RAM modules in the AMD server are ECC modules. I don't know about the Intel server. dmidecode doesn't give any info on the modules it uses. But could ECC really explain the huge difference? Googling suggests that ECC RAM gives a few % penalty. I'm seeing a lot more than that here! | |
Sep 25, 2012 at 15:33 | comment | added | pauska | Well - your laptop isn't running ECC, so that would explain that. Is ECC running on the Intel server? | |
Sep 25, 2012 at 15:27 | history | asked | ntherning | CC BY-SA 3.0 |