I ran into a problem on which I can't really find any solutions in literature. I am looking at a Graphene sheet that is sandwiched in a biased pn junction (current flows orthogonal to the Graphene layer). Graphene seems to be an almost transparent tunelling barrier for a, so the depletion region width still changes under bias even with the graphene layer inbetween.

What I don't really get is why the graphene's fermi level changes? Is the carrier concentration in the 2D sheet actually changing? And can I treat the reverse bias case as if the Graphene would sit in the middle of a capacitor? If so how would I go about calculating the Fermi level change as a function of the applied voltage?

Thanks a bunch in advance!

I ran into a problem on which I can't really find any solutions in literature. I am looking at a Graphene sheet that is sandwiched in a biased pn junction (current flows orthogonal to the Graphene layer). Graphene seems to be an almost transparent tunelling barrier, so the depletion region width still changes under bias even with the graphene layer inbetween.

What I don't really get is why the graphene's fermi level changes? Is the carrier concentration in the 2D sheet actually changing? And can I treat the reverse bias case as if the Graphene would sit in the middle of a capacitor? If so how would I go about calculating the Fermi level change as a function of the applied voltage?

Thanks a bunch in advance!