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My Lecturer's Solution Why is the first equation = 0? Couldn't there be current sinking into the Vee rail of the opamp or being sourced out from the Vcc rail of the opamp and then outputted into the circuit to Vin? And why didn't the lecturer take KCL at the node I pointed with a blue arrow in the picture? Lecturer's Solution

My Solution My Solution

My Mathematica Output My Mathematica Output

Could someone please tell me why I am getting a different answer from my lecturer? The goal is to find Vout in terms of Vin. Thank you in advance.

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  • \$\begingroup\$ I don't follow where the issue is but V1 is always 0V. And V3 equals V2. Also you use different numbers for nodes. You have V4 where lecturer had V1. \$\endgroup\$
    – Justme
    Commented Apr 28 at 7:39
  • \$\begingroup\$ V1 (in your solution) is 0V because the left-most opamp + R1 & R3 form a inverting amplifier. \$\endgroup\$
    – Designalog
    Commented Apr 28 at 7:51
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    \$\begingroup\$ MikeW, are there two R5 resistors in both diagrams? Even if one of them doesn't contribute, there probably shouldn't be two devices with the same name. \$\endgroup\$ Commented Apr 28 at 8:15
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    \$\begingroup\$ MikeW, I would give them separate device names so that they could be uniquely referenced in a conversation. In a corner I'd write that annotation. I'd not do it by using the same name everywhere the values are equal. \$\endgroup\$ Commented Apr 28 at 8:31
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    \$\begingroup\$ @MikeWazowski I get that you don't want to type it in twice. But in this case, you only have to type it in once anyway, because one of them isn't involved in any of these equations. So you could still give it a different name -- in this case only. I take your point about other cases where you want to type less. Since I type very fast -- over 100 words per minute, corrected (professionally measured) -- I care more about giving everything distinct names as a matter of routine. \$\endgroup\$ Commented Apr 28 at 9:43

2 Answers 2

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That's simple, the first solution is wrong precisely because of the reason you indicated: KCL on node \$V_\text{in}\$ simply does not give the equation where you put the question mark. That would only be correct if \$I_\rm{in}=0\$, which is not the case for this circuit.

The second solution is correct.

Probably the easiest solution is to observe that the first opamp creates an output \$V_4=\frac{-R_3}{R_1}\,V_\text{in}\$, then \$V_\text{in}\$ and \$V_4\$ are "averaged" by \$R_2\$ and \$R_4\$ to \$\frac{R_2 V_4+R_4 V_\text{in}}{R_2+R_4}\$ and finally the second amplifier has voltage gain \$\frac{R_5+R_6}{R_5}\$, so combining those factors almost immediately gives the answer:

In[1]:= Factor[ (R2 V4+R4 Vin)/(R2+R4) * (R5+R6)/R5  /. V4-> -(R3/R1)*Vin ]

          (R2 R3 - R1 R4) (R5 + R6) Vin
Out[1]= -(-----------------------------)
                 R1 (R2 + R4) R5

(You need Factor[] to get it in this standard form).

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  • \$\begingroup\$ I believe this might be it, I have emailed my lecturer to confirm. Thank you \$\endgroup\$ Commented Apr 28 at 8:27
  • \$\begingroup\$ @MikeWazowski You really did get the correct answer. So there's no worry. \$\endgroup\$ Commented Apr 28 at 8:32
  • \$\begingroup\$ Also, Could you explain what you mean by "averaged" and the equation that arose from it? Is it the same as saying Vin and V4 are summed? Thank you \$\endgroup\$ Commented Apr 28 at 8:50
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    \$\begingroup\$ They are summed with different weights, and because the junction between R2 and R4 is not loaded (assuming an ideal 2nd opamp) that node, V2, must have voltage V4+R4/(R4+R2) * Vin, by simple resistive divider action, which leads to the more symmetric expression I used. \$\endgroup\$ Commented Apr 28 at 9:03
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    \$\begingroup\$ Let's call it the "real engineers don't use Kirchhoff" approach. \$\endgroup\$ Commented Apr 28 at 15:59
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You already know, from at least Jos and from me, that you performed your work correctly.

With the advent of solvers, I exploit KCL a bit more than I once did. More equations aren't a problem, as the solver does all the hard work for me. I focus on just getting things right and developing a methodology that works broadly and can be applied almost on automatic pilot, without investing a lot of hand-wringing.

I added a couple of currents to your diagram (and changed that R5 to an R7):

enter image description here

Then, for me, that goes something like this:

eq1 = Eq( v1/r1 + v1/r3, vin/r1 + v4/r3 )                      # KCL V1
eq2 = Eq( v2/r2 + v2/r4, vin/r2 + v4/r4 )                      # KCL V2
eq3 = Eq( v3/r5 + v3/r6, vout/r6 )                             # KCL V3
eq4 = Eq( v4/r3 + v4/r4, io1 + v1/r3 + v2/r4 )                 # KCL V4
eq5 = Eq( vout/r6, io2 + v3/r6 )                               # KCL Vout
eqns = [ eq1, eq2, eq3, eq4, eq5, Eq( v1, 0 ), Eq( v2, v3 ) ]  # Virtual V1=0 & V2=V3
unknowns = [ io1, io2, v1, v2, v3, v4, vout ]
na, da = fraction(simplify( solve( eqns, unknowns )[vout] / vin ))
factor(na) / da
(r5 + r6)*(r1*r4 - r2*r3)/(r1*r5*(r2 + r4))

I'm not saying it's better. Just wanted to offer you something to consider, as well. That kind of stuff just flows out of my hand without thinking, as I skim a schematic. I produce it almost without thought, now.

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  • \$\begingroup\$ Thank you, I believe your method is what I consider a brute force method as you write down as many equations as you can and then let a solver handle it. This method is useful for smaller circuits but not as viable for larger, more complex circuits which are better solved using intuition like Jos Bergervoet has. Especially since I only have 6 minutes per question during the final exam. \$\endgroup\$ Commented Apr 28 at 15:13
  • \$\begingroup\$ @MikeWazowski I completely agree. \$\endgroup\$ Commented Apr 28 at 16:31

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