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Where is pin #1 on this IC?

It seems to have a line and a dot. The dot doesn't seem to line up with a corner pin though.

Chip is a INA210AIDCKR.

enter image description here

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    \$\begingroup\$ While the datasheet does show a dot, I'm pretty sure the line is indicating that top left is pin 1. I will admit that that is a needlessly vague diagram in the datasheet however. \$\endgroup\$ Commented Jan 26 at 5:04
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    \$\begingroup\$ Great picture, well done \$\endgroup\$
    – Bryan
    Commented Jan 26 at 22:34
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    \$\begingroup\$ None of that looks like a real dot to me. The line at the top of the image, however, is definitely the thing you should pay attention to. \$\endgroup\$
    – Adam Haun
    Commented Jan 26 at 22:40

4 Answers 4

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Generally, when the text/print is the correct way up, bottom-left is the pin-1. This applies to QFP/LQFP, QFN, SOT, DIP, SOIC, SOP and maybe some other packages. For your question, it's the top-left according to the picture.

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    \$\begingroup\$ Oh really? Is this just your experience or is there an "official" norm/convention for this? \$\endgroup\$
    – tobalt
    Commented Jan 26 at 7:39
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    \$\begingroup\$ Have definitely seen some odd conventions before. No examples offhand unfortunately. Incidentally, PLCC does (or may?) start in the middle of a row, just to throw everyone off (good riddance I suppose?). \$\endgroup\$ Commented Jan 26 at 8:42
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    \$\begingroup\$ @tobalt sorry for the misunderstanding caused by my wording. Of course it's not an official thing, just like the fact that pin numbering direction is just a tradition. \$\endgroup\$ Commented Jan 26 at 8:54
  • \$\begingroup\$ @TimWilliams oh yeah, PLCC starts from the middle. I even forgot the existence of it, haven't seen one for years. \$\endgroup\$ Commented Jan 26 at 9:07
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In your picture, pin 1 should be top left. (I have never seen any ICs with a bar line that does not start on the first pin and ends on the last pin.)

The datasheet specifies pin 1 in relation to the index area:
enter image description here

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  • \$\begingroup\$ +1. The "horizonal line" convention is extremely common in SOIC parts. \$\endgroup\$ Commented Jan 27 at 12:44
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I measured resistance between pins 1 and 4 (assuming top left is pin #1) and got a resistance of 1 or 2 MOhms (I can't remember now). Pins 3 to 6 were not connected. So this supports top left being pin #1.

Thanks for the input.

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There is also a dot in the bottom right corner.

If it were my chip I would check VSS and VDD pins with a diode tester to be sure. Or you could try to measure the internal resistors.

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