Logic Circuit For A 2-Bit Multiplier Using Repeated Addition Algorithm [closed]

Question

I am trying to build a logic schematic in Proteus for this problem:

A 2-bit multiplicand and a 2-bit multiplier will be accepted and processed to solve the corresponding product. Since only 2 bits are accepted for both multiplicand and multiplier, the maximum possible product is 9 (inputs of 3 * 3 = 9 | 11 x 11 = 1001)

INPUT/S: Switches

OUTPUTS/S: 7-Segment Display or LEDS

I am relatively new with Logic Circuits so I am having trouble figuring out the circuit design for this particular problem. I came up with the idea of using a 74LS193 Binary Counter for the multiplier and JK Flip Flops for the Multiplicand. Will this work?

Answer 1

You want to compute $$(2a_1+a_0)(2b_1+b_0)=4a_1b_1+2(a_0b_1+a_1b_0)+a_0b_0.$$

The low-order bit is obviously $$\color{green}{a_0b_0},$$ just a logical and,

$$\tag{0}a_0\land b_0.$$

The next bit is

$$\color{green}{a_0b_1+a_1b_0},$$ with a possible carry. The sum is a xor of the two terms, the carry is the and.

$$\tag{1}(a_0\land b_1)\oplus(a_1\land b_0),\\\text{cy}:=a_0\land b_1\land a_1\land b_0$$

Now we have the high order bit $$\color{green}{a_1b_1+\text{cy}}$$ and a possible carry.

$$\tag{2}(a_1\land b_1)\oplus \text{cy},$$ $$\tag{3}a_1\land b_1\land\text{cy}.$$

Answer 2

You get answers arguing combinatorial circuits because with a 2-bit multiplier there is one addition at most:
No use for Repeated Addition.
And you still don't state explicitly you want a (non-trivial, more than one state) state machine.

With factors a₁a₀ and b₁b₀, result bit p₀ is almost trivial (odd if both factors are):
p₀: a₀∧b₀      , p₃ hardly more complex (at least 8 if both factors are 3):
p₃: a₁∧b₁∧p₀

"The four-bit" p₂ is set when each factor is at least 10₂ but not both are odd:
p₂: a₁∧b₁∧¬p₀

The product is two, three, or six if one factor is at least 10₂ and the other one is odd but not both are 11₂:
p₁: ((a₁∧b₀)∨(a₀∧b₁))∧¬p₃
(a₁∧b₀∧¬p₃)∨(a₀∧b₁∧¬p₃)

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Another approach is to create circuits for each segment directly, e.g. using Karnaugh-maps, capital letters denoting inverted (input) variables, 1⁺/0⁺ variants possible (en.wikipedia states 6&9 "with tail" most common, resulting in segment a identical to d below):

       a         b         c         d         e         f         g
   ⁰⁰₀₁¹¹₁₀  ⁰⁰₀₁¹¹₁₀  ⁰⁰₀₁¹¹₁₀  ⁰⁰₀₁¹¹₁₀  ⁰⁰₀₁¹¹₁₀  ⁰⁰₀₁¹¹₁₀  ⁰⁰₀₁¹¹₁₀
00  1 1 1 1   1 1 1 1   1 1 1 1   1 1 1 1   1 1 1 1   1 1 1 1   0 0 0 0
01  1 0 1 1   1 1 1 1   1 1 1 0   1 0 1 1   1 0 0 1   1 0 0 0   0 0 1 1
11  1 1 1 0⁺  1 1 1 0   1 1 1 1   1 1 1⁺1   1 0 0 1   1 0 1 1   0 1 1 1
10  1 1 0⁺0   1 1 0 1   1 0 1 1   1 1 1 0   1 1 1 0   1 0 1 1   0 1 1 1
   A₁A₀+B₁B₀   A₀+B₀   A₁A₀+B₁B₀ A₁A₀+B₁B₀ A₁A₀+B₁B₀ A₁A₀+B₁B₀ a₀b₁+a₁b₀
  +A₁b₁+a₁B₁   +a₀b₀  +a₀b₀+a₁b₁   +a₁b₀  +a₀B₀+A₀b₀   +a₁b₁     +a₁b₁
   +a₁a₀b₁b₀   +A₀B₀               +a₀b₁

(juxtaposition instead of ∧, + instead of ∨ for brevity)