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I'm designing a control circuit meant to drive a proportional valve. I'm trying to simulate the driver and mosfet side of things in LTspice using the LT1160 half bridge driver and two readily available NMOS transistors. The problem I have is that while my setup seems to be working fine I'm noticing huge current spikes at the source of the high side MOS. At first I thought it might be because of shoot through but after checking the gate control signals they don't seem to overlap. Here are some pictures of my observation along with the circuit. LTSpice circuit

The green signal is the command signal which has a frequency of 1 kHz and the blue one is the current at the source of M1.

Thanks in advance, it's my first time posting here if i'm doing anything wrong please let me know :)

PS: I should add that this is only a testing circuit and that the actual solution will use a full bridge to allow reverse voltage driving the Pvalve for fast current decay.

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    \$\begingroup\$ Gate signals don't need to overlap for shoothrough. They just have to be closer together than the MOSFET transition time is long. Imagine if your MOSFET's transition time was 1 second long. \$\endgroup\$
    – DKNguyen
    Commented Apr 1, 2022 at 14:03
  • \$\begingroup\$ Ismail Assaidi - Welcome :-) As you are new to the site, here is some advice. (a) Stack Exchange (SE) works best with clear, specific questions. At the moment, there is no "question mark" ("?") in your post. Please edit & add a clear, specific question, perhaps something like "What is causing [ ... add your details here ... ] and what can I do to prevent that?" or whatever your specific question is. (b) Please view the tour and help center (at least the "Asking" and "Our model" sections) to see some info about how SE differs from typical forums. (c) Add link(s) to relevant datasheet(s). Thanks. \$\endgroup\$
    – SamGibson ♦
    Commented Apr 1, 2022 at 14:05

2 Answers 2

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To fast turn on/off or not enough blanking between high side and low side fets may be the problem.

Try to add something like below, experiment with Rg1 and Rg2 values adjust for your circuit.

enter image description here

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Texas instruments has a guide called Fundamentals of MOSFET and IGBT Gate Driver Circuits that discusses managing spikes that result from FETs in a variety of configurations. Sorry I can't provide more specifics, I found this question because I'm facing a similar issue.

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