What is making my DC/DC converter's capacitor to blow up?

Question

I'm having some capacitors blown up and I am not sure what's the cause of this. It is definitely NOT OVERVOLTAGE and NOT in WRONG POLARIZATION. Let me introduce the scenario:

I have designed a double cascaded Boost converter using this scheme:

Vout can be obtained from: \$\ Vout=Vin/(1-D_\max)^2\$ where \$D_ \max\$ is the maximum duty cycle.

I want to step-up an input voltage of 12V into a 100V output voltage. My load is 100Ω, hence it would be dissipating 100W. If I consider no losses (I know I'm being TOO idealist, calm down), the input voltage source will deliver 8.33A

We can split the circuit into two stages, the first stage's ouput is the second stage's input. Here comes my problem:

C1 is blowing up when the voltage accross it reaches aproximately 30V. C1 is rated for 350V and it's a 22uF electrolytic capacitor (radial) 10x12.5mm. I am totally sure the polarization is right.

The second stage's input current should (ideally) be around 3.33A (in order to keep the 100W with 30V for this stage). I know the current might be higher, but it's a good aproximation for this purpose. The switching frequency is 100Khz.

For some reason the cap blows up and I don't really know why. Of course that when this happens the cap (dead) is hot.

May it be an effect of the ESR? This cap has a 0.15 Dissipation Factor at 1kHz. \$|X_c|= 1/(2*pi*100Khz*22uF) =0.07234Ω \$
So \$ESR=0.15*0.07234= 0.01Ω\$ (DF would also increase for a higher frequency) for C1.

Since L2 is pretty large, I would expect C1 to deliver a pretty constant current equal to the second stange's input current (3.33A) so the power dissipated in ESR is supposed to be around: \$3.33A^2 * 0.01Ω = 0.11W\$

Can this make it too hot and explode? I doubt it....

Additional information:

• L1 is about 1mHy
• L2 is about 2mHy
• D1 is a schottky 45V diode
• I tried two different capacitors: 160V 22uF that blown up, and then I tried the 350V 22uF which also blown up.
• Measuring the current in the cap would be difficult due to PCB layout
• Both the first and second MOSFET has a small snubber RC network. I don't think it could cause any problem in C1.

I am waiting for your ideas!

EDIT n°1= L1 is pretty large, ripple is only 1% of the rated input current (let's say 100W/12V = 8.33A) so que can assume it's almost like a constant current at the input of stage 1. For stage 2 inductor current ripple is less than 5%, we can also think it's a constant current). When MOSFET 1 is turned ON, around 8.33A goes through it, but when it's turned off, that current (we said "practically constant") would go through D1. We can say current in the capacitor would be \$ I_{D1} - I_{L2} \$ . Then we finally find that the peak current in C1 must be in the order of \$ 8.33A - 3.33A = 5A\$. Pretty much current! and it would dissipate \$5A^2 *0.01Ω = 0.25W \$ ... but looks not so much power dissipated in the ESR.

As someone said, I might also consider the internal inductance of the cap, but i think this wouldn't be a cause of power dissipation (we know inductors store energy but don't make it into heat) Anyways, despite of the calculation above was very simplified and it might be a little higher power dissipated, I still wonder if it's enough to make it boil and explode!

Answer 1

The peak ripple current for C1 is approximately I(out)/D where D= duty cycle. If the Duty cycle is say 50% at your 30 V output then the ripple for C1 is 3.3/0.5 = 6.6 A. As the duty cycle is reduced this gets worse. If the duty cycle was 10% = 0.1 then the current peak is 33 A.

If you then use your ESR value the power dissipated is about 0.4 W, much higher than you previously calculated.

If I look at 160 V capacitors on Mouser (I'm assuming you are using Al Electrolytics) then I see nothing generally available that could sustain the peak currents you need.

I'd suggest you use TI's Webench to work through a design and then look at the selected components. You will notice on many of the designs they use very low ESR capacitors and often have two or even three in parallel. For example they use Panasonic polymer caps often in the designs and they have very high ripple current ratings at very high frequencies.

Answer 2

I bet on power created by ripple currents. Your capacitor has some ESR. Pulsed current of your magnitude may leave there like ten-twenty watts quite easily. So... Put several in parallel, with lowest possible ESR/ESL

Answer 3

Your capacitors may have quite big internal inductance - too much for 100 kHz pulses. You should connect some smaller non-electrolytic capacitors in parallel with them until the oscilloscope shows that the voltage limits are not exceeded.

BTW. the current rushes as pulses from the inductors as soon as the fets turn off. The start of the current pulse is very sharp - as sharp as how fast the fets can turn off. If the switching frequency is 100 kHz, the capacitors really should handle several MHz properly. NOTE: low inductance electrolytes for SMPS applications are developed but they cost some real money, not pennies as the ordinary models.

Late addition: All your output power is at first stored in the capacitors - no direct way from the input to the output. As suggested in several othe comments - the sheer dissipation in your capacitors may cause some boiling. The inductance causes it to localize more at the near ends of the inside plate roll.

Answer 4

Cap                       Max ESR Ω   Max RMS ripple     
(uF)   VDC  PART #        120Hz      (mA) 120Hz,105C  DxL (mm)
---    ---- ------------  ---------  ----------       ---------
22     160  226CKE160MLN  11.3094     92              10x12.5

C*ESR=Ts=22uF*11.3 Ω = 250us , f(bw) =0.35/Ts = 5.6kHz which is the fastest rate of charging it can handle and reach full charge voltage.

f switch = 100kHz PWM variable D thus as 100kHz it will appear as a lossy resistor only at 11.3 Ω with losses of \$Pc=I^2ESR\$ and a rated ripple current of 92mA the device can only handle 1.03W at max temp of 105C or a rise of 85C above room temp 20C.

Now to choose a 22uF cap, you want to follow the App Note recommendation and choose a low ESR cap and not a general purpose electrolytic ( G.P. e-cap)

What they don't tell you in school, ( and I have commented many times on this site) is that an G.P. e-cap has a ESR*C >= 100 us while a low ESR cap < 10us and best case < 1us. This is what you need when choosing a switch period < 10us.

Now it is not hard to sort Digikey or Mouser databases by ESR or search in other ways for ultra low ESR. You might also want to read the MSDS datasheets of e-caps for toxic material exposure when they blow up.

The App Note advises you to expect under INDUCTOR SELECTION that

A good estimation for the inductor ripple current is 20% to 40% of the output current.

E-Caps are rated in several ways. D.F. @120Hz ( for small line bridge rectifier use) max ripple current ESR (typ.) not aged after 10 yrs !

It is important to remember that Caps are usually charged by dumping current pulses then discharged slowly between pulses, so the duty cycle determines the ratio of Peak/Avg current. If the ripple voltage is 10% then the pk/avg current ratio is 10/1. If the energy dissipation is the power dissipation in each pulse times the pulse repetition rate. No problem as 100Hz and 1000x worse at 100kHz.

Hence the result of not understanding subtle advice in the App Note ... is a Chinese fire-cracker.

Refs from OP in comments that should have been in Question

• http://www.mouser.com/ds/2/88/ckh_cke-611140.pdf Cap specs
• http://www.ti.com/lit/an/slva372c/slva372c.pdf Boost Reg Design App Note

Answer 5

Note that there is capacitors for FILTERING ... And there is capacitors for DECOUPLING.

The capacitors for FILTERING are specified for a RMS current. This specification is printed on the capacitor. So if not printed, don't use as filtering.

There are also capacitors for filtering at "high frequencies" (in high frequency converters --> possibly > 10 MHz). These capacitors have a resonnant frequency as high as possible ... which lead to a residual very low inductance, wiring is critical.