I've shown this circuit in a couple of places I think, and used it a number of times -- mind, mostly for personal projects[1]. Looks like a good fit here, so, without further ado:
Source: my website, https://www.seventransistorlabs.com/Images/Low_Sat_CCS.png
Compared to the normal ring-of-two CCS as in the OP, we have the load resistor R_L, the main pass transistor Q1, and current-sense R1. The change is everything else.
Realize we can consider the common-emitter BJT, as an error amp with built-in VBE input offset, or as a differential amplifier against same, and this more or less describes operation of the ring-of-two circuit.
We can replicate the same function, using a differential amplifier circuit. This allows a lower VREF, higher precision (overall loop gain), and removes the VBE temperature dependency (at least to first order, or as an intrinsic design element).
Note that VREF isn't shown. It can be a resistor divider if VCC is reasonably stable, or when a proportional control is desired; it can be a VBE, divided down as needed, if the tempco is acceptable; or a zener, TL431, or any other kind of voltage reference, will give excellent stability. It can even be inputted from a potentiometer or DAC for variable control.
As shown, 100mV VREF is quite feasible, a worthwhile improvement over the ~700mV original. I wouldn't recommend using this below 50mV or so, where device matching (including thermal), and offset and gain, become much more significant issues. The VBE error between random parts can be 20mV or more; for same-lot (often same-wafer) parts, the average is closer to 5-10mV, not fantastic but acceptable for most discrete analog purposes.
For very low voltages, I would strongly suggest a proper op-amp IC instead; perhaps a precision or auto-zero type, and using Kelvin connections to avoid error in the shunt resistor.
Matched-die parts are available, for example BCM857DS, a dual intended for current mirror or diff-pair application. Note these do not track thermally because they are not monolithic (same die) pairs. They are independent dies connected only by the plastic package. For best results, minimize differential heating by using low operating voltage and current, and similar conditions in both transistors.
C1 is an important detail: with multiple stages in the feedback loop, compensation is a concern, and enough phase shift may be present that the circuit oscillates. C1, maybe with some series resistance, is used to degenerate the gain of Q4 at high frequencies, reducing loop gain and increasing phase margin. Values can be tested by measuring output current under a step-change input condition.
Finally, D1 sets a limit to GATE voltage, a few volts above VGS(th). More than VGS(on) won't be useful, and pushing near VGS(max) risks device failure. (Incidentally, note that D1 provides an AC ground-return path to Q1 gate, which might turn it into a Colpitts oscillator; a ferrite bead in series with the gate pin or D1 may be desirable.)
D1 can be omitted if VCC is under VGS(max).
Analog Design
Analog circuits are fascinating, and so rarely a topic of study these days, that I think it's worth further discussing this circuit in more detail.
The diff pair can only be NPN or PNP[2]. NPNs would require a negative supply for the tail current (about -0.6V), so, aside from some very obscure tricks[3], we'd need an additional supply, which is probably a huge pain. So, PNP it must be.
With TAIL being about VBE+100mV above ground, we can drive the collector(s) into a load of VBE (without the 100mV), and avoid saturation of the diff pair.
The diff pair load must be a VBE, give or take, because we need another amplifier to level-shift up to VGS, and a CE amplifier fits the bill.
Incidentally, we could run the CE amplifier at lower current, or use a wider-area junction, to further decrease its VBE in relation to the diff pair's. R2 and R4, as shown, aren't in such a ratio that would give this trade-off; it would be more like R4 = 47k and R2 = 4.7k to do that. But such a trick isn't important for VREF in the 100s mV range.
Note that the change in VBE with IC is quite meager: ΔVBE goes as 60mV per decade of IC ratio, so, even if R4 = 100k and R2 = 4.7k, it's only a 60mV overhead, hardly important. But, if we needed to operate all the way down to zero VREF, that would indeed be enough to get us there. Again, assuming matching is solved, which means a monolithic matched pair -- but that puts us right back into boutique-land, so, it's again not important here.
We could also use a folded cascode, which doesn't afford current gain (a second stage might still be required), but it avoids the VBE headroom concern at the diff pair. This is definitely not important here, but is a staple of low-voltage analog circuitry, monolithic RF amps, etc.
Alternately, we could use the VBEs-at-ratio-current trick to give a small but stable offset voltage; this is small indeed (again, mid-10s mV), so not really useful for VREF here, but with some amplification, it becomes the basis of what's called a bandgap voltage reference. Again, for all these reasons, not really something you want to do with discrete components, but it's a keystone of IC design!
The loop gain might also be noteworthy here; if R4 were replaced by a CCS (a PNP current mirror, perhaps), the loop voltage gain can be quite high indeed (thousands, limited by Q4 and CCS Early effect). However as shown, since Q1 gate current is minuscule, R4 dominates. Again, hardly important for LED drive (accuracy of say 10% is already more than required), but in a higher precision application, or for signal purposes (say you want to build your own discrete op-amp for S&Gs), the higher gain will be desirable.
Note that, even with a CCS, loop gain is limited at AC by Q1's gate capacitance. Which is further compounded by Miller effect. Which, even further, means R_L's exact (AC) impedance is a term in loop stability -- when using such a circuit as DC load for example, an R+C from DRN to ground can be desirable (ballpark values for an IRFZ34N might be 10nF + 10Ω, but depend on circuit characteristics). This is probably not required for an LED load, but perhaps if the LEDs are quite distant from this regulator circuit, the reactance of those cables could become an issue.
[1] I probably wouldn't bother with / recommend this approach for commercial use, where ICs are available with comparable or better performance in fewer parts. Let alone where altogether different solutions are possible, that a stand-alone CCS cannot possibly solve itself: for example, an SMPS with CC/CV output, directly delivers power into a variable load, at high efficiency, without a dropper circuit at all.
There is some space for compromise, where a dropper handles short-term fluctuations, and a switching control circuit handles it long-term; many mid-market LED products are designed this way, with a PFC (power factor correction) front-end to draw sinusoidal mains current, which necessarily outputs some (100/120Hz) voltage ripple, which is taken up by the dropper stage. (The PFC stage also can't change very quickly, since its control has to average over multiple mains cycles.) Higher efficiency requires a 2nd switching stage, and thus increased cost.
[2] I mean, it could be MOS, but discrete matched MOSFETs aren't available other than boutique. It'll be a cold day somewhere when boutiques are better than BJTs for driving LEDs, so, I'll stick with BJTs here.
Also, there's such a thing as a "complementary diff pair", but it has two VBEs instead of ~none, so, isn't exactly viable here.
[3] There's a riddle, I believe attributed to Bob Widlar (probably in his "What's All This [Stuff] Anyhow?" series of articles; it's been a long time since I reviewed them and an obvious hit doesn't turn up from a quick search), of how to get negative voltage from a BJT. Of course there are the more obvious cases like making it oscillate from parasitic (lead) inductance or whatever, but there is in fact a static version possible. The trick is this: by avalanching the B-E junction, a little light is produced, along with free charge carriers; both act upon the B-C junction as a photocell, developing some voltage as the carriers are "sucked up" across the junction potential. Typical ratings might be -0.2V at some ~µA, but that can indeed be enough to help pull a "single supply" op-amp (like LM324) all the way to true zero output, for example.
An analogous, and even older, version of this riddle might be the zero-bias current produced by a vacuum tube; indeed there are some similarities in mechanism, i.e. charge carriers freed by some power source, then allowed to drift. In the vacuum tube case, the source is thermal, making it a true heat engine -- albeit an extraordinarily inefficient one (a 6AL5 diode might consume a watt of heater power, and produce a few nanowatts maximum).
These factoids are rarely if ever useful in circuit, but are a fascinating window into the physics at work in these devices.
