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All my QFN footprints are made with the Altium internal "Tools -> IPC Compliant Footprint Wizard". I get nice footprints with vias in the thermal pad.

When I try to place one of those footprints to the PCB, I get an short circuit violation between the via and the pad

enter image description here

but it shows the error as mentioned below enter image description here

enter image description here

It is recommended in datasheet that exposed pad should not be connected to GND

let me know if allowing the short circuit in design rules is ok or is there any other way to solve it.

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  • \$\begingroup\$ Have you specified that pad 25 is ground ? I don't see a net on pad 25 \$\endgroup\$
    – efox29
    Commented Mar 13, 2015 at 11:34
  • \$\begingroup\$ Ahh, this is a bug that has persisted pretty much since the Protel days. If you insist on using the vias, you have to manually edit them and set them to whatever net the pad is on. If "No Net" doesn't fix it, you have to add a dummy net just for that pad, and set the vias to the same net. \$\endgroup\$ Commented Mar 13, 2015 at 13:59

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Change the designator of the vias to be the same as the pad, i.e. 25.

Then, go ahead and add a Net Label to the schematic for its pin. Altium doesn't like it when things don't have net labels.

enter image description here (In the menu bar)

enter image description here

Here in my case the pin is named GND, but it's currently not connected to anything. You should no longer have short circuit violations in your PCB.

enter image description here

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