futility: updater: Increase try count from 8 to 10
An Intel device (such as Rex) may need up to 9 boots after firmware
update:
- Boot 0: Initial reboot with CSE from RO.
CSE needs global reset to boot from RW.
- Boot 1: Reboot is needed for CSE RW update.
- Boot 2: EC needs update. Reboot to EC RO to allow EC sync.
- Boot 3: After rebooting from EC RO, CSE also starts from RO.
Therefore CSE needs another global reset to boot from RW.
- Boot 4: EC sync screen needs to be displayed, so reboot to initialize
display.
- Boot 5: Perform EC sync (with EFS2 NO_BOOT mode) and show EC sync
screen. Under NO_BOOT mode, reboot is needed to allow EC to
jump to RW.
- Boot 6: Similar to Boot 3, reboot is needed for CSE to boot from RW.
- Boot 7: Display is still initialized (due to boot 4), so reboot to
unset display request.
- Boot 8: Finally, both CSE RW and EC are synced, and DUT is able to
boot to kernel.
To sum up,
- CSE RW update needs 1 reboot
- EC sync needs 2 reboots
- Showing EC sync screen needs 2 reboots
- CSE switching to RW needs 3 reboots (one per cold reset)
so that's 9 boots in total. Therefore, reserve one boot margin and
increase the try count to 10.
Since we already consider the EC sync situation above, there's no need
to give an extra 2 boots for cfg->ec_image.
BUG=b:345085042
TEST=make runtests
BRANCH=none
Change-Id: I19ee52aed837d4073c86f85f6c579c938600ee54
Signed-off-by: Yu-Ping Wu <yupingso@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/vboot_reference/+/5666540
Reviewed-by: Hung-Te Lin <hungte@chromium.org>
1 file changed
