Timeline for Who loads the BIOS in RAM during computer bootstrap
Current License: CC BY-SA 3.0
15 events
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| Aug 17, 2018 at 15:41 | comment | added | JdeBP | No it isn't. You are confused about when all of that happens. It happens after the first instruction is executed. It is, after all, done by the processor executing instructions (in the SEC and PEI phases, roughly). I explained how the firmware code is mapped for the first instruction both in this answer and in the previous one. | |
| Aug 11, 2018 at 1:19 | comment | added | AJMansfield | This is skipping a huge number of steps: you've gotta decode the flash descriptor table, execute the Intel ME to (if nothing else) load microcode, and then somehow map the flash chip BIOS partition - which by the way you don't even know the location of until you've done those other steps - into the expected address range, all before the first opcode of the BIOS can be executed. | |
| Mar 20, 2017 at 10:16 | history | edited | CommunityBot |
replaced http://superuser.com/ with https://superuser.com/
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| Jan 1, 2014 at 18:59 | comment | added | nitro2k01 | Furthermore, a BIOS/firmware could very well choose to load itself into RAM, for example for performance reasons, or because the code is compressed to save space. But regardless of that, it's indirectly loaded into a type of RAM, namely the cache, and it may also choose to do this explicitly, a technique called cache-as-RAM. | |
| Jan 1, 2014 at 18:50 | comment | added | nitro2k01 | To expand on that point, though. If you interpret the word literally, and not as used commonly, RAM does not contrast ROM. RAM contrasts sequential access memory, like a tape or a CD. In that sense, all modern ROM/flash memories are RAM. But that's not the typical use of the word, since it's convenient to use the term RAM to mean the more narrow meaning, like a computer's "RAM". By the common definition, an EEPROM is not RAM. And the term "flash RAM" is bogus in any case. | |
| Jan 1, 2014 at 18:44 | comment | added | nitro2k01 | @JdeBP I don't know why you insist on calling Pm49FL004T a "Flash RAM chip". It's a serial EEPROM/flash chip like any other, which is page erasable etc, just that it's connected through an LPC bus and not SPI or whatever. There's nothing "RAM-ish" about it. NVRAM is just a genericized term. | |
| Jan 1, 2014 at 18:21 | comment | added | Cygnus | @JdeBP : I have added a new question- superuser.com/questions/695769/… | |
| Jan 1, 2014 at 16:59 | comment | added | JdeBP | I think that your questions are better handled as actual questions, not comments on this answer. Look at some of the "Related" questions on the right, then figure out a question to ask that will further your understanding. (There's certainly room on SuperUser for some questions+answers on the very basics, it seems from a brief shufti.) | |
| Jan 1, 2014 at 16:54 | comment | added | Cygnus | @Dougvj : In that case, why do we have a separate address of FFFFFFF0 for it ? Wouldn't the NVRAM size be just the size of the firmware ? | |
| Jan 1, 2014 at 16:46 | comment | added | Dougvj | When he says non-volatile random access memory (NVRAM) he is referring to a different technology than the RAM used as main system memory (Typically Dynamic Random Access Memory, DRAM). It's a separate chip from main RAM that contains the firmware even when powered off, thus the "non-volatile" part. | |
| Jan 1, 2014 at 16:41 | comment | added | Cygnus | Thank you, this seems much more clear to me. However, when you say non-volatile RAM and data being read from it, does it mean that the BIOS is coupled with the RAM in some way ? Does each RAM chip come with a BIOS ? I know this may seem stupid, but I'm a beginner in this topic. | |
| S Jan 1, 2014 at 16:37 | history | edited | JdeBP | CC BY-SA 3.0 |
improved suggested edit from Quora Fea (whose answer is now deleted)
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| S Jan 1, 2014 at 16:37 | history | suggested | Quora Feans | CC BY-SA 3.0 |
adapting ans
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| Jan 1, 2014 at 16:27 | review | Suggested edits | |||
| Jan 1, 2014 at 16:37 | |||||
| Jan 1, 2014 at 16:19 | history | answered | JdeBP | CC BY-SA 3.0 |