Timeline for Why does RAM have to be volatile?
Current License: CC BY-SA 3.0
17 events
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| Jan 25, 2017 at 0:19 | comment | added | user446730 | @user539484 Nice catch! But, not quite sure which memory type you mentioned. I think you were referring to what RBerteig mentioned - battery-backed (BBSRAM)? Correct me if I mixed it up with something else... | |
| Sep 28, 2013 at 16:09 | audit | First posts | |||
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| Sep 23, 2013 at 13:28 | audit | First posts | |||
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| Sep 7, 2013 at 1:00 | comment | added | RBerteig | According to wiki what you describe was called NOVRAM. I've never seen one in the wild. Popular devices in the 80s were serial EEPROMs with a few 100s of total bits based on a floating gate technology, using large geometry to get good lifecycle times. EEPROM evolved into FLASH devices, which bifurcate to NAND for capacity and NOR for speed and reliability. | |
| S Sep 6, 2013 at 0:22 | history | edited | Scott - Слава Україні | CC BY-SA 3.0 |
Formatting and punctuation.
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| S Sep 6, 2013 at 0:22 | history | suggested | user201262 | CC BY-SA 3.0 |
formatting, fixed links
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| Sep 6, 2013 at 0:13 | review | Suggested edits | |||
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| Sep 6, 2013 at 0:11 | audit | First posts | |||
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| Sep 4, 2013 at 14:26 | audit | First posts | |||
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| Sep 4, 2013 at 12:15 | audit | First posts | |||
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| Sep 1, 2013 at 20:27 | comment | added | supercat | @RBerteig: My understanding is that an NVRAM is a marriage of an SRAM with a non-volatile store and a large enough energy storage medium to allow the SRAM to be copied to the non-volatile store without extermal power. If the SRAM and non-volatile store were in separate chips, transferring one to the other would take awhile (and consume a lot of energy). Marrying them together allows the transfer to occur much faster. | |
| Aug 31, 2013 at 23:07 | review | Suggested edits | |||
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| Aug 30, 2013 at 23:13 | comment | added | user539484 | SRAM+battery assembly is not a true NVRAM. True NVRAM built on EEPROM. | |
| Aug 30, 2013 at 19:24 | comment | added | RBerteig | NVRAM is not the same as battery backed SRAM. NVRAM has a capacitor per bit that can be sufficiently insulated that any charge does not leak away, but can also be sensed, and programmed. The bit cell structure is fairly large, and in some technologies involved more exotic fab steps, so NVRAM is a low density high cost technology. But it also has very long storage lifetime. CMOS SRAM draws very little power when idle, and so backing it up with a battery is cost effective. The once common PC "CMOS" device is one example. | |
| Aug 30, 2013 at 17:22 | comment | added | Daniel R Hicks | DRUM is fast, but not very dense, and the cost per character is high. (What?? DRAM??? Never mind.) | |
| Aug 30, 2013 at 16:14 | comment | added | Chris O | Yay memristor technology, it will be at least 10 yrs or more before we see cool products based on these "new" devices. But they should hold a ton of promise for memory implementations. | |
| Aug 30, 2013 at 12:55 | history | answered | pjc50 | CC BY-SA 3.0 |