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corrected spelling and clarified slightly
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Mokubai ♦
Mokubai ♦
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In short, this is a mixture of limitations. One is in how many "address lines" the cpuCPU itself supports (different from the 64/32-bit address space/register size), 32-bits lines would allow 4GiB of RAM, having a 33rd line connected would allow 8GiB of ram and so on.

The other problem is in how many of those address lines the manufacturer actually bothers tioto wire up to the memory controller.

In order to simplify the design the manufacturers tend to decide on a current realistic amount of memory and wire up as many address lines as are needed to support that amount of memory.

Routing all those address lines on a PCB is painstaking work as all the track lengths have to be as near identical as possible (as at the high frequencies that these things now operate at having a slightly different length can mean that data on one line arrives at a different time to the data sent on another line even though the sender sent them both at the same time) and so manufacturers will keep the amount of work as small as possible and so supporting 65TiB of RAM is nowhere near the same priority as getting the motherboard out this year.

In short, this is a mixture of limitations. One is in how many "address lines" the cpu itself supports (different from the 64/32-bit address size), 32-bits would allow 4GiB of RAM, having a 33rd line connected would allow 8GiB of ram and so on.

The other problem is in how many of those address lines the manufacturer actually bothers tio wire up to the memory controller.

In order to simplify the design the manufacturers tend to decide on a current realistic amount of memory and wire up as many address lines as are needed to support that amount of memory.

Routing all those address lines on a PCB is painstaking work as all the track lengths have to be as near identical as possible (as at the high frequencies that these things now operate at having a slightly different length can mean that data on one line arrives at a different time to the data sent on another line even though the sender sent them both at the same time) and so manufacturers will keep the amount of work as small as possible and so supporting 65TiB of RAM is nowhere near the same priority as getting the motherboard out this year.

In short, this is a mixture of limitations. One is in how many "address lines" the CPU itself supports (different from the 64/32-bit address space/register size), 32 lines would allow 4GiB of RAM, having a 33rd line connected would allow 8GiB of ram and so on.

The other problem is in how many of those address lines the manufacturer actually bothers to wire up to the memory controller.

In order to simplify the design the manufacturers tend to decide on a current realistic amount of memory and wire up as many address lines as are needed to support that amount of memory.

Routing all those address lines on a PCB is painstaking work as all the track lengths have to be as near identical as possible (as at the high frequencies that these things now operate at having a slightly different length can mean that data on one line arrives at a different time to the data sent on another line even though the sender sent them both at the same time) and so manufacturers will keep the amount of work as small as possible and so supporting 65TiB of RAM is nowhere near the same priority as getting the motherboard out this year.

Source Link
Mokubai ♦
Mokubai ♦
  • 93.8k
  • 27
  • 215
  • 245

In short, this is a mixture of limitations. One is in how many "address lines" the cpu itself supports (different from the 64/32-bit address size), 32-bits would allow 4GiB of RAM, having a 33rd line connected would allow 8GiB of ram and so on.

The other problem is in how many of those address lines the manufacturer actually bothers tio wire up to the memory controller.

In order to simplify the design the manufacturers tend to decide on a current realistic amount of memory and wire up as many address lines as are needed to support that amount of memory.

Routing all those address lines on a PCB is painstaking work as all the track lengths have to be as near identical as possible (as at the high frequencies that these things now operate at having a slightly different length can mean that data on one line arrives at a different time to the data sent on another line even though the sender sent them both at the same time) and so manufacturers will keep the amount of work as small as possible and so supporting 65TiB of RAM is nowhere near the same priority as getting the motherboard out this year.